IP Library Granted Patent US 12,538,428
Granted Patent B2
US 12,538,428 · App. 18/101,108 · Granted Jan 27, 2026

Electrical circuit board assemblies

Inventors: Jeffrey Ewanchuk (Manchester, CT); Paul Martin Franz (Shelburne, VT); Christopher Fitzhugh (Essex Junction, VT); Scott R. Durkee (New Haven, VT)
Assignee: Simmonds Precision Products, Inc.
H05K1/186H05K1/115H05K3/0017H05K3/30H05K3/4038
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Quick Facts
Patent No.
US 12,538,428
App. No.
18/101,108
Granted
Jan 27, 2026
Kind
B2
Abstract

A circuit board assembly can include a circuit component die, a first dielectric layer disposed on a first side of the circuit component die made of a first dielectric material having a high thermal conductivity, a second dielectric layer disposed on a second side of the circuit component die made of the first dielectric material, and a bulk dielectric material having a lower thermal conductivity than the first dielectric material. The bulk dielectric material can have a lower glass transition temperature than the first dielectric material and being heterogeneous to the first dielectric material. The bulk dielectric material can be in flowed contact with lateral sides of the circuit component die, the first dielectric layer, and the second dielectric layer to laterally enclose the circuit component die, the first dielectric layer, and the second dielectric layer.

Claims (26)

1 . A circuit board assembly, comprising:

a circuit component die;

a first epoxy resin sheet disposed on a first side of the circuit component die, the first epoxy resin sheet having a first thermal conductivity and a first glass transition temperature that exceeds safe temperatures of the circuit component;

a second epoxy resin sheet having the first thermal conductivity and the first glass transition temperature disposed on a second side of the circuit component die; and

a bulk dielectric material having a second thermal conductivity that is less than the first thermal conductivity of the first and second epoxy resin sheets, the bulk dielectric material having a second glass transition temperature that is less than the first glass transition temperature of the first and second epoxy resin sheets, wherein the bulk dielectric material is in contact with lateral sides of the circuit component die, the first epoxy resin sheet, and the second epoxy resin sheet to laterally enclose the circuit component die, the first epoxy resin sheet, and the second epoxy resin sheet.

2 . The assembly of claim 1 , wherein the first epoxy resin sheet is flush with the bulk dielectric material such that the first epoxy resin sheet and the bulk dielectric material form a first planar surface.

3 . The assembly of claim 2 , wherein the second epoxy resin sheet is flush with the bulk dielectric material such that the second epoxy resin sheet and the bulk dielectric material form a second planar surface.

4 . The assembly of claim 3 , further comprising a first conductive layer disposed in contact with the first planar surface to be in contact with the first epoxy resin sheet and the bulk dielectric material.

5 . The assembly of claim 4 , further comprising a second conductive layer disposed in contact with the second planar surface to be in contact with the second epoxy resin sheet and the bulk dielectric material.

6 . The assembly of claim 5 , further comprising one or more first vias defined through the first conductive layer and the first epoxy resin sheet to the circuit component die, and one or more second vias defined through the second conductive layer and the second epoxy resin sheet to the circuit component die.

7 . The assembly of claim 6 , wherein the one or more first vias and the one or more second vias are filled with conductive material.

8 . A method for embedding a circuit component die within a circuit board assembly, comprising:

disposing a first epoxy resin sheet having a first thermal conductivity and a first glass transition temperature on a first conducive layer;

disposing the circuit component die on the first epoxy resin sheet, the circuit component die having safe temperatures that are less than the glass transition temperature of the epoxy resin sheet;

disposing a second epoxy resin sheet having the first thermal conductivity and the first glass transition temperature on the circuit component die;

stacking a plurality of sheets of a bulk dielectric material having a second thermal conductivity that is less than the first thermal conductivity of the first and second epoxy resin sheets on the first conductive layer and around the first epoxy resin sheet, the second epoxy resin sheet, and the circuit component die, wherein each of the plurality of sheets of the bulk dielectric includes an opening at least as wide as the first epoxy resin sheet and the second epoxy resin sheet, the bulk dielectric material having a second glass transition temperature that is less than the first glass transition temperature of the first and second epoxy resin sheets;

disposing a second conductive layer on the second epoxy resin sheet and the stacked plurality of sheets of the bulk dielectric material to form a sandwich structure having the first epoxy resin sheet, the second epoxy resin sheet, the circuit component die, and the bulk dielectric material between the first conductive layer and the second conductive layer; and

heating the sandwich structure to a temperature at or above the second glass transition temperature of the bulk dielectric material but below the first glass transition temperature of the first epoxy resin sheet and the second epoxy resin sheet to flow the bulk dielectric material around the first epoxy resin sheet, the second epoxy resin sheet, and the circuit component die to remove air pockets.

9 . The method of claim 8 , further comprising milling one or more first vias through the first conductive layer and the first epoxy resin sheet to the circuit component die.

10 . The method of claim 9 , further comprising milling one or more second vias defined through the second conductive layer and the second epoxy resin sheet to the circuit component die.

11 . The method of claim 10 , wherein milling includes UV drilling and cleaning.

12 . The method of claim 11 , further comprising filling the one or more first vias and one or more second vias with conductive material.

13 . The method of claim 12 , wherein filling includes a deposition process.

14 . The method of claim 13 , wherein the deposition process includes copper plating.

15 . The method of claim 14 , further comprising adding additional circuit board structure on to the first conductive layer and the second conductive layer.

16 . The method of claim 15 , further comprising thick copper bonding the assembly with a third epoxy resin sheet having the first thermal conductivity.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 2, 2025
From: SIMMONDS PRECISION PRODUCTS, INC.
To: GOODRICH CORPORATION
Reel/Frame 073051/0379 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 31, 2023
From: EWANCHUK, JEFFREY
To: RAYTHEON TECHNOLOGIES CORPORATION
Reel/Frame 063195/0616 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 31, 2023
From: FRANZ, PAUL MARTIN; FITZHUGH, CHRISTOPHER; DURKEE, SCOTT R.
To: SIMMONDS PRECISION PRODUCTS, INC.
Reel/Frame 063195/0709 →
Continuity (1)
Related Publication 20240251507A1 · Jul 25, 2024
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