Advanced persistent threat detection
Techniques are described herein for advanced persistent threat detection. An example method can include a device receiving a message identifying an instruction loaded onto an instruction cache of a secure processer. The device can transmit a control instruction to configure a kernel image to collect a metric over a first time interval, the metric being generated based at least in part on the secure processor executing the instruction during the first time interval. The device can receive the first metric from the kernel image, the metric being indicative of a transition of the secure processor from a non-secure state to a secure state. The device can determine whether the secure processor is undergoing a computing attack based on the metric. The device can transmit the determination of whether the secure processor is undergoing a computing attack to a sender of the message.
1 . A method, comprising:
receiving, by a computing device, a message identifying an instruction loaded onto an instruction cache of a secure processor;
transmitting, by the computing device, a control instruction to configure a kernel image to collect a first metric over a first time interval and a second metric over a second time interval, the first metric being generated based at least in part on the secure processor executing the instruction during the first time interval;
receiving, by the computing device, the first metric from the kernel image, the first metric being indicative of a transition of the secure processor from a non-secure state to a secure state;
receiving, by the computing device, the second metric from the kernel image, wherein the second metric is collected by the kernel image during the second time interval;
determining, by the computing device, an average value of a first value of the first metric and a second value of the second metric;
comparing, by the computing device, the average value to a second threshold;
determining, by the computing device, whether the secure processor is undergoing a transient attack or a sustained attack based at least in part on the comparison; and
determining, by the computing device, whether to transmit the determination of whether the secure processor is undergoing the computing attack based at least in part on whether the computing attack is the transient attack or the sustained attack.
2 . The method of claim 1 , wherein the first metric is collected using a secure processer application programming interface (API).
3 . The method of claim 1 , wherein the first metric is collected using an instruction cache driver.
4 . The method of claim 1 , wherein the computing attack is an advanced persistent threat (APT) attack.
5 . The method of claim 1 , wherein the message is generated based at least in part on a memory mapping of the message.
6 . The method of claim 1 , wherein the secure processor is a first secure processor, and wherein a workload is rerouted from the first secure processor to a second secure processor based at least in part on transmitting the determination of whether the secure processor is undergoing the computing attack.
7 . A computing device, comprising:
a processor; and
a computer-readable medium including instructions that, when executed by the processor, cause the processor to perform operations comprising:
receiving a message identifying an instruction loaded onto an instruction cache of a secure processor;
transmitting a control instruction to configure a kernel image to collect a first metric over a first time interval and a second metric over a second time interval, the first metric being generated based at least in part on the secure processor executing the instruction during the first time interval;
receiving the first metric from the kernel image, the first metric being indicative of a transition of the secure processor from a non-secure state to a secure state;
receiving the second metric from the kernel image, wherein the second metric is collected by the kernel image during the second time interval;
determining an average value of a first value of the first metric and a second value of the second metric;
comparing the average value to a second threshold;
determining whether the secure processor is undergoing a transient attack or a sustained attack based at least in part on the comparison; and
determining whether to transmit the determination of whether the secure processor is undergoing the computing attack based at least in part on whether the computing attack is the transient attack or the sustained attack.
8 . The computing device of claim 7 , wherein the first metric is collected using a secure processer application programming interface (API).
9 . The computing device of claim 7 , wherein the first metric is collected using an instruction cache driver.
10 . The computing device of claim 7 , wherein the computing attack is an advanced persistent threat (APT) attack.
11 . The computing device of claim 7 , wherein instructions that, when executed by the processor, further cause the processor to perform operations comprising:
determining an average value of a first value of the first metric and a second value of the second metric;
comparing the average value to a second threshold;
determining whether the secure processor is undergoing a transient attack or a sustained attack based at least in part on the comparison; and
determining whether to transmit the determination of whether the secure processor is undergoing the computing attack based at least in part on whether the computing attack is the transient attack or the sustained attack.
12 . The computing device of claim 7 , wherein the message is generated based at least in part on a memory mapping of the message.
13 . The computing device of claim 7 , wherein the secure processor is a first secure processor, and wherein a workload is rerouted from the first secure processor to a second secure processor based at least in part on transmitting the determination of whether the secure processor is undergoing the computing attack.
14 . A non-transitory computer-readable medium including stored thereon a sequence of instructions that, when executed by a processor, causes the processor to perform operations comprising:
receiving a message identifying an instruction loaded onto an instruction cache of a secure processor;
transmitting a control instruction to configure a kernel image to collect a first metric over a first time interval and a second metric over a second time interval, the first metric being generated based at least in part on the secure processor executing the instruction during the first time interval;
receiving the first metric from the kernel image, the first metric being indicative of a transition of the secure processor from a non-secure state to a secure state;
receiving the second metric from the kernel image, wherein the second metric is collected by the kernel image during the second time interval;
determining an average value of a first value of the first metric and a second value of the second metric;
comparing the average value to a second threshold;
determining whether the secure processor is undergoing a transient attack or a sustained attack based at least in part on the comparison; and
determining whether to transmit the determination of whether the secure processor is undergoing the computing attack based at least in part on whether the computing attack is the transient attack or the sustained attack.
15 . The non-transitory computer-readable medium of claim 14 , wherein the first metric is collected using a secure processer application programming interface (API).
16 . The non-transitory computer-readable medium of claim 14 , wherein the first metric is collected using an instruction cache driver.
17 . The non-transitory computer-readable medium of claim 14 , wherein the computing attack is an advanced persistent threat (APT) attack.
18 . The non-transitory computer-readable medium of claim 14 , wherein the message is generated based at least in part on a memory mapping of the message.