High Voltage Blocking III-V Semiconductor Device
A semiconductor device includes a type IV semiconductor base substrate, a first type III-V semiconductor layer formed on a first surface of the base substrate, and a second type III-V semiconductor layer with a different bandgap as the first type III-V being formed on the first type III-V semiconductor layer. The semiconductor device further includes first and second electrically conductive device terminals each being formed on the second type III-V semiconductor layer and each being in ohmic contact with the two-dimensional charge carrier gas. The base substrate includes a dielectric layer formed directly on a lower region of type IV semiconductor material, and a highly-doped layer of type IV semiconductor material formed directly on the dielectric layer.
1 . A semiconductor device, comprising:
a base substrate, comprising a lower region of type IV semiconductor material extending to a rear surface of the base substrate, a dielectric layer formed directly on the lower region of type IV semiconductor material, and a highly-doped layer of type IV semiconductor material formed directly on the dielectric layer, the highly-doped layer having a doping concentration that is at least two orders of magnitude greater than a doping concentration of the lower region of type IV semiconductor material;
a first type III-V semiconductor layer disposed on the base substrate;
a second type III-V semiconductor layer formed on the first type III-V semiconductor layer, the second type III-V semiconductor layer having a different bandgap as the first type III-V semiconductor layer such that a two-dimensional charge carrier gas forms at an interface between the first and second type III-V semiconductor layers; and
first and second electrically conductive device terminals each being formed on the second type III-V semiconductor layer and each being in ohmic contact with the two-dimensional charge carrier gas.
2 . The semiconductor device of claim 1 , wherein the semiconductor device is a high-electron-mobility-transistor, wherein the first terminal is a source terminal, and wherein the second terminal is a drain terminal.
3 . The semiconductor device of claim 1 , wherein the type III-V semiconductor device is a diode, wherein the first terminal is an anode, and wherein the second terminal is a cathode.
4 . The semiconductor device of claim 1 , wherein a net doping concentration of the highly-doped layer is at least 10 18 dopant atoms/cm 3 .
5 . The semiconductor device of claim 1 , wherein the lower region of type IV semiconductor material is a first conductivity type region, and wherein the highly-doped layer of type IV semiconductor material is a second conductivity type region.
6 . The semiconductor device of claim 1 , wherein the lower region of type IV semiconductor material and the highly-doped layer of type IV semiconductor material are each regions of silicon.
7 . The semiconductor device of claim 1 , wherein the lower region of type IV semiconductor material is a region of silicon, and wherein the highly-doped layer of type IV semiconductor material is a region of polysilicon.
8 . The semiconductor device of claim 1 , wherein the first type III-V semiconductor layer is a layer of gallium nitride, and wherein the second type III-V semiconductor layer is layer of aluminum gallium nitride.