Granted Patent B2

US 12,253,935 · App. 18/115,914 · Granted Mar 18, 2025

Inventors: Nan Wang (Chengdu, CN); Chi Chen (Chengdu, CN); Yang Wu (Chengdu, CN); Jing Ye (Chengdu, CN)

Assignee: Dell Products L.P.

G06F11/368G06F11/3676

Abstract

Claims (62)

1. A method for testing, comprising:

obtaining code modification information, program error information and test case information in respective first, second and third data structures of a processor-based computing system, the code modification information of the first data structure comprising code modification records performed for program errors in the program error information of the second data structure, and the test case information comprising test cases of the third data structure made for the program errors, the code modification records comprising at least first code modification records of a first type at a first hierarchical level of code modifications and second code modification records of a second type, different than the first type, at a second hierarchical level of code modifications;

selecting, by processing of at least portions of the first, second and third data structures in the processor-based computing system, a first test case set associated with the code modification records from the test case information according to the program error information, the first test case set being selected based on at least one additional data structure configured by the processor-based computing system to characterize mapping relationships between particular ones of the first and second code modification records of the first data structure and particular ones of the test cases of the third data structure;

sorting, in the processor-based computing system, multiple test cases in the first test case set to generate a test strategy for the code modification records; and

initiating execution of at least a portion of the generated test strategy in the processor-based computing system.

2. The method according to claim 1 , wherein selecting a first test case set associated with the code modification records from the test case information comprises:

determining a second test case set having mapping relationships with the code modification records from the test case information according to mapping relationships between the code modification records and the program errors and mapping relationships between the program errors and the test cases; and

de-duplicating the test cases in the second test case set to obtain the first test case set.

3. The method according to claim 2 , wherein the code modification records comprise function-level code modification records, and the first test case set comprises function-level test cases having mapping relationships with the function-level code modification records.

4. The method according to claim 3 , wherein the code modification records further comprise file-level code modification records, and the first test case set further comprises file-level test cases having mapping relationships with the file-level code modification records.

5. The method according to claim 4 , wherein the code modification records further comprise module-level code modification records, and the first test case set further comprises module-level test cases having mapping relationships with the module-level code modification records.

6. The method according to claim 1 , wherein sorting multiple test cases in the first test case set comprises:

for each test case in the first test case set, determining a hit rate score, a program error priority score and a test time score respectively;

obtaining a total score for indicating the priority of each test case in the first test case set based on the hit rate score, the program error priority score and the test time score; and

sorting multiple test cases in the first test case set based on the total scores.

7. The method according to claim 6 , wherein determining the hit rate score comprises:

for each test case in the first test case set, determining a number of associated program errors that will be fixed according to the code modification records; and

obtaining the hit rate score corresponding to each test case in the first test case set based on a proportion of the number of the associated program errors corresponding to each test case in the first test case set to a total number of the associated program errors corresponding to all test cases in the first test case set.

8. The method according to claim 7 , wherein determining the program error priority score comprises:

obtaining priority values of the associated program errors corresponding to each test case in the first test case set; and

obtaining the program error priority score corresponding to each test case in the first test case set based on a ratio of the priority values of the associated program errors corresponding to each test case in the first test case set to the sum of the priority values of the associated program errors corresponding to all test cases in the first test case set.

9. The method according to claim 8 , wherein determining the test time score comprises:

obtaining an execution time duration of each test case in the first test case set; and

obtaining the test time score corresponding to each test case in the first test case set based on a ratio of a reference time duration to the execution time duration of each test case in the first test case set.

10. The method according to claim 6 , wherein sorting multiple test cases in the first test case set further comprises: for each test case in the first test case set, obtaining a feature-level program error distribution score; and

wherein the total score is obtained based on the hit rate score, the program error priority score, the test time score and the feature-level program error distribution score.

11. The method according to claim 10 , wherein obtaining the feature-level program error distribution score comprises:

obtaining a number of program errors mapped to each test case in the first test case set across features and a number of the features; and

obtaining the feature-level program error distribution score corresponding to each test case in the first test case set based on the number of program errors mapped to each test case in the first test case set across features and the number of the features.

12. An electronic device, comprising:

at least one processor; and

at least one memory storing computer program instructions, wherein the computer program instructions, when executed by the at least one processor, cause the electronic device to perform actions comprising:

obtaining code modification information, program error information and test case information in respective first, second and third data structures of a processor-based computing system, the code modification information of the first data structure comprising code modification records performed for program errors in the program error information of the second data structure, and the test case information comprising test cases of the third data structure made for the program errors, the code modification records comprising at least first code modification records of a first type at a first hierarchical level of code modifications and second code modification records of a second type, different than the first type, at a second hierarchical level of code modifications;

selecting, by processing of at least portions of the first, second and third data structures in the processor-based computing system, a first test case set associated with the code modification records from the test case information according to the program error information, the first test case set being selected based on at least one additional data structure configured by the processor-based computing system to characterize mapping relationships between particular ones of the first and second code modification records of the first data structure and particular ones of the test cases of the third data structure;

sorting, in the processor-based computing system, multiple test cases in the first test case set to generate a test strategy for the code modification records; and

initiating execution of at least a portion of the generated test strategy in the processor-based computing system.

13. The electronic device according to claim 12 , wherein selecting a first test case set associated with the code modification records from the test case information comprises:

determining a second test case set having mapping relationships with the code modification records from the test case information according to mapping relationships between the code modification records and the program errors and mapping relationships between the program errors and the test cases; and

de-duplicating the test cases in the second test case set to obtain the first test case set.

14. The electronic device according to claim 12 , wherein sorting multiple test cases in the first test case set comprises:

for each test case in the first test case set, determining a hit rate score, a program error priority score and a test time score respectively;

obtaining a total score for indicating the priority of each test case in the first test case set based on the hit rate score, the program error priority score and the test time score; and

sorting multiple test cases in the first test case set based on the total scores.

15. The electronic device according to claim 14 , wherein determining the hit rate score comprises:

for each test case in the first test case set, determining a number of associated program errors that will be fixed according to the code modification records; and

obtaining the hit rate score corresponding to each test case in the first test case set based on a proportion of the number of the associated program errors corresponding to each test case in the first test case set to a total number of the associated program errors corresponding to all test cases in the first test case set.

16. The electronic device according to claim 15 , wherein determining the program error priority score comprises:

obtaining priority values of the associated program errors corresponding to each test case in the first test case set; and

obtaining the program error priority score corresponding to each test case in the first test case set based on a ratio of the priority values of the associated program errors corresponding to each test case in the first test case set to the sum of the priority values of the associated program errors corresponding to all test cases in the first test case set.

17. The electronic device according to claim 16 , wherein determining the test time score comprises:

obtaining an execution time duration of each test case in the first test case set; and

obtaining the test time score corresponding to each test case in the first test case set based on a ratio of a reference time duration to the execution time duration of each test case in the first test case set.

18. The electronic device according to claim 14 , wherein sorting multiple test cases in the first test case set further comprises: for each test case in the first test case set, obtaining a feature-level program error distribution score; and

wherein the total score is obtained based on the hit rate score, the program error priority score, the test time score and the feature-level program error distribution score.

19. The electronic device according to claim 18 , wherein obtaining the feature-level program error distribution score comprises:

obtaining a number of program errors mapped to each test case in the first test case set across features and a number of the features; and

obtaining the feature-level program error distribution score corresponding to each test case in the first test case set based on the number of program errors mapped to each test case in the first test case set across features and the number of the features.

20. A computer program product tangibly stored on a non-transitory computer-readable medium and comprising machine-executable instructions, wherein the machine-executable instructions, when executed by a device, cause the device to perform actions comprising:

obtaining code modification information, program error information and test case information in respective first, second and third data structures of a processor-based computing system, the code modification information of the first data structure comprising code modification records performed for program errors in the program error information of the second data structure, and the test case information comprising test cases of the third data structure made for the program errors, the code modification records comprising at least first code modification records of a first type at a first hierarchical level of code modifications and second code modification records of a second type, different than the first type, at a second hierarchical level of code modifications;

selecting, by processing of at least portions of the first, second and third data structures in the processor-based computing system, a first test case set associated with the code modification records from the test case information according to the program error information, the first test case set being selected based on at least one additional data structure configured by the processor-based computing system to characterize mapping relationships between particular ones of the first and second code modification records of the first data structure and particular ones of the test cases of the third data structure;

sorting, in the processor-based computing system, multiple test cases in the first test case set to generate a test strategy for the code modification records; and

initiating execution of at least a portion of the generated test strategy in the processor-based computing system.

Assignments (1)

Priority Claims (1)

Continuity (1)

References Cited (16)