Memory arrays and methods used in forming a memory array comprising strings of memory cells
In some embodiments, a memory array comprising strings of memory cells comprise laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. Operative channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. Insulative pillars are laterally-between and longitudinally-along immediately-laterally-adjacent of the memory blocks. The pillars comprise vertically-spaced and radially-projecting insulative rings in the conductive tiers as compared to the insulative tiers. Other embodiments, including methods, are disclosed.
1. A method used in forming a memory array comprising strings of memory cells, comprising:
forming a lower stack comprising vertically-alternating lower insulative tiers and lower conductive tiers, the lower stack comprising lower-laterally-spaced memory-block regions;
forming lower-horizontally-elongated trenches in the lower stack that individually are laterally-between immediately-laterally-adjacent of the lower-memory-block regions;
forming sacrificial material in the lower-horizontally-elongated trenches;
forming an upper stack comprising vertically-alternating upper insulative tiers and upper conductive tiers above the lower stack and the sacrificial material, the upper stack comprising upper-laterally-spaced memory-block regions that are directly above the lower-laterally-spaced memory-block regions;
forming upper-elevationally-extending holes in the upper stack that are laterally-between and longitudinally-spaced-along the immediately-laterally-adjacent upper-memory-block regions, the upper holes being atop and exposing the sacrificial material in the lower-horizontally-elongated trenches,
insulative material of the respective lower insulative tiers or the upper insulative tiers extending around at least one of said lower-horizontally-elongated trenches and laterally across space that is laterally-between the immediately-laterally-adjacent lower-memory-block regions or the immediately-laterally-adjacent upper-memory-block regions; and
removing the sacrificial material from the lower-horizontally-elongated trenches through the upper-elevationally-extending holes.
2. The method of claim 1 comprising, after the removing and through the upper-elevationally-extending holes and through the lower-horizontally-elongated trenches, isotropically etching away and replacing placeholder material in the upper and lower conductive tiers with conducting material of individual conductive lines.