Area selective deposition templated by hydrogen and halogen resists
A process for area selective atomic layer deposition (ALD) at the near atomic scale (sub 10 nm) is disclosed. A substrate surface is cleaned and terminated with hydrogen and a pattern written in the hydrogen terminated surface by selectively depassivating the surface using scanning tunneling microscope lithography. The depassivated regions are subjected to a halogen flux with the thus passivated regions further subjected to a functionalization process creating functionalized regions. The role of hydrogen and halogen can be inverted to invert the tone of the pattern. The substrate is then subjected to the ALD process, with growth occurring only in the non-functionalized regions. The substrate may then optionally be subjected to selective etching to remove the functionalized regions and the portions of the substrate under the functionalized regions.
1 . A process for fabricating a device, the process comprising the steps of:
providing a substrate;
cleaning a surface of the substrate;
terminating the surface of the substrate with one of hydrogen, a halogen, or a pseudo-halogen to thereby form a terminated surface, the halogen not including Br;
patterning the terminated surface, the step of patterning including:
depassivating one or more regions of the terminated surface; and
subjecting the thus depassivated one or more regions of the terminated surface to a flux of Br to thereby create one or more passivated regions;
subjecting the terminated surface and the one or more passivated regions to a functionalization process whereby each of the one or more passivated regions is terminated with covalently-bonded molecules to thereby form one or more corresponding functionalized regions; and
selectively growing a layer of material on the terminated surface, wherein the layer of material does not grow on the one or more functionalized regions.
2 . The process of claim 1 , wherein the substrate includes a semiconductor wafer.
3 . The process of claim 2 , wherein the semiconductor wafer includes a group IV element.
4 . The process of claim 1 , wherein the step of cleaning includes at least one of sonication, wet chemical cleaning, or flash annealing.
5 . The process of claim 4 , wherein the flash annealing employs a temperature of approximately 850° C. to approximately 1250° C.
6 . The process of claim 1 , wherein the step of terminating the surface includes subjecting the surface to:
a flux of one of atomic hydrogen, an atomic halogen, a molecular halogen, or a molecular pseudo-halogen; or
a wet chemical solution that terminates the surface in hydrogen, halogen, or pseudo-halogen.
7 . The process of claim 6 , wherein a temperature of the substrate during the step of terminating is between approximately 20° C. and approximately 450° C.
8 . The process of claim 1 , wherein the step of patterning employs one of STM lithography, e-beam lithography, photolithography, or ion-beam lithography.
9 . The process of claim 1 , wherein the functionalization process includes one of a solvothermal chemistry process, a wet chemistry-based process, or a gas chemistry-based process.
10 . A process for fabricating a device, the process comprising the steps of:
providing a substrate;
cleaning a surface of the substrate;
terminating the surface of the substrate with one of hydrogen, a halogen, or a pseudo-halogen to thereby form a terminated surface, the halogen not including Br;
patterning the terminated surface with Br to thereby form one or more passivated regions;
subjecting the terminated surface and the one or more passivated regions to a functionalization process whereby each of the one or more passivated regions is terminated with covalently-bonded molecules to thereby form one or more corresponding functionalized regions the functionalization process employing a mesitylene solution including 1-dodecene; and
selectively growing a layer of material on the terminated surface, wherein the layer of material does not grow on the one or more functionalized regions.
11 . The process of claim 1 , wherein the step of selectively growing employs an atomic layer deposition process.
12 . The process of claim 1 , wherein the layer of material includes a metal or an oxide.
13 . The process of claim 12 , wherein the oxide includes zinc oxide or aluminum oxide.
14 . The process of claim 1 further comprising a step of annealing the substrate with the one or more passivated regions after the step of patterning the terminated surface.
15 . The process of claim 1 further comprising a step of annealing the substrate with the layer of material after the step of selectively growing.
16 . The process of claim 1 further comprising a step of selectively etching the one or more functionalized regions after the step of selectively growing, to thereby create one or more corresponding exposed regions of the substrate.
17 . The process of claim 16 , wherein the step of selectively etching further comprises selectively etching the one or more exposed regions of the substrate.