IP Library Granted Patent US 11,860,395
Granted Patent B2
US 11,860,395 · App. 18/129,656 · Granted Jan 2, 2024

Self-lit display panel

Inventors: Zhujun Shi (Redmond, WA); Keith Patterson (Kirkland, WA); Maxwell Parsons (Seattle, WA); Yongdan Hu (Bothell, WA); Giuseppe Calafiore (Woodinville, WA); Zhimin Shi (Bellevue, WA)
Assignee: Meta Platforms Technologies LLC
G02B6/0036G02B6/0078G02F1/13439G02F1/134309G02F2201/063G02F2201/302
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Quick Facts
Patent No.
US 11,860,395
App. No.
18/129,656
Granted
Jan 2, 2024
Kind
B2
Abstract

A self-lit display panel includes a photonic integrated circuit payer including an array of waveguides and an array of out-couplers for out-coupling portions of the illuminating light through pixels of the panel. The self-lit display panel may include a transparent electronic circuitry layer backlit by the photonic integrated circuit layer; the two layers may be on a same substrate or on opposed substrates defining a cell filled with an electro-active material. The configuration allows for chief ray engineering, zonal illuminating, and separate illumination with red, green, and blue illuminating light.

Claims (12)

1. A method of manufacturing a self-lit display panel, the method comprising:

forming a photonic integrated circuit (PIC) layer comprising an array of waveguides for guiding illuminating light and an array of out-couplers coupled to the array of waveguides for out-coupling portions of the illuminating light;

forming an electronic circuitry layer comprising a pixelated electrode layer comprising an array of pixel electrodes; and

disposing the PIC layer relative to the electronic circuitry layer such that in operation, the illuminating light portions propagate through the array of pixel electrodes.

2. The method of claim 1 , wherein the PIC layer is disposed on a first substrate, and the electronic circuitry layer is disposed on the PIC layer.

3. The method of claim 1 , wherein the electronic circuitry layer is disposed on a first substrate, and the PIC layer is disposed on the electronic circuitry layer.

4. The method of claim 1 , wherein the PIC and electronic circuitry layers are disposed on first and second substrates respectively.

5. The method of claim 4 , further comprising forming a cell by disposing the first and second substrates in a fixed-apart relationship with one another.

6. The method of claim 5 , further comprising filling the cell with an electro-active material.

7. The method of claim 1 , wherein the PIC and electronic circuitry layers are disposed on a same substrate on top of one another.

8. The method of claim 7 , further comprising forming a cell by providing a second substrate and disposing the first and second substrates in a fixed-apart relationship with one another.

9. The method of claim 8 , further comprising filling the cell with an electro-active material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2023
From: SHI, ZHUJUN; PATTERSON, KEITH; PARSONS, MAXWELL; HU, YONGDAN; CALAFIORE, GIUSEPPE; SHI, ZHIMIN
To: FACEBOOK TECHNOLOGIES, LLC
Reel/Frame 063211/0167 →
CHANGE OF NAME Recorded Apr 3, 2023
From: FACEBOOK TECHNOLOGIES, LLC
To: META PLATFORMS TECHNOLOGIES, LLC
Reel/Frame 063241/0509 →
Continuity (4)
Division 17741404 · May 10, 2022
Provisional Application 63288920 · Dec 13, 2021
Provisional Application 63288342 · Dec 10, 2021
Related Publication 20230236351A1 · Jul 27, 2023