IP Library Patent Application 18133092
Patent Application
App. No. 18/133,092

DATA RECEPTION METHOD, DATA TRANSMISSION METHOD AND APPARATUSES THEREOF

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Quick Facts
Patent No.
US None
App. No.
18/133,092
Abstract

An apparatus, applicable to a terminal equipment, includes a receiver configured to receive first indication information, the first indication information being used for indicating first configuration information of a first control resource set, a processor configured to determine second configuration information of a second control resource set of the terminal equipment according to the first indication information or a synchronization signal block (SSB) to which the first control resource set corresponds, and monitor, on resources of the second control resource set, monitor a physical downlink control channel used for receiving a physical downlink shared channel where system information is located.

Claims (35)

1 . An apparatus, applicable to a terminal equipment, the apparatus comprising:

a receiver configured to receive first indication information, the first indication information being used for indicating first configuration information of a first control resource set;

a processor configured to:

determine second configuration information of a second control resource set of the terminal equipment according to the first indication information or a synchronization signal block (SSB) to which the first control resource set corresponds; and

monitor, on resources of the second control resource set, monitor a physical downlink control channel used for receiving a physical downlink shared channel where system information is located.

2 . The apparatus according to claim 1 , wherein the processor determines a frequency-domain starting or ending or central location of the first control resource set according to the first indication information, and takes the frequency-domain starting or ending or central location of the first control resource set as a frequency-domain starting or ending or central location of the second control resource set, or performs offset on the starting or ending or central location of the frequency-domain of the first control resource set by a second offset value and takes the location after performing offset as a frequency-domain starting, or ending or central location of the second control resource set.

3 . The apparatus according to claim 1 , wherein when the first indication information is an index, the processor takes an index obtained by performing a third offset value plus on an index of the first control resource set as an index of the second control resource set.

4 . The apparatus according to claim 1 , wherein the processor takes a frequency-domain starting or ending or central location of the synchronization signal block (SSB) to which the first control resource set corresponds as a starting and/or ending and/or central location of a frequency-domain of the second control resource set, or performs offset on a starting and/or ending and/or central location of a frequency-domain of the synchronization signal block (SSB) to which the first control resource set corresponds by a fourth offset value and takes the location after performing the offset as a starting and/or ending and/or central location of a frequency-domain of the second control resource set.

5 . The apparatus according to claim 1 , wherein the processor is further configured to determine that a time-domain length of the second control resource set is less than or equal to a time-domain length of the first control resource set,

or a time-domain length of the second control resource set is equal to a time-domain length to which the index of the second control resource set corresponds,

or a frequency-domain bandwidth of the second control resource set is predefined or equal to a bandwidth to which the index of the second control resource set corresponds.

6 . The apparatus according to claim 1 , wherein the first indication information is contained in a master information block (MIB).

7 . The apparatus according to claim 1 , wherein the first configuration information comprises at least one of a pattern multiplexed by the synchronization signal block and the first control resource set, frequency-domain bandwidth information, time-domain length information, and the first offset value of the frequency-domain between the first control resource set and the synchronization signal block.

8 . The apparatus according to claim 1 , wherein the terminal equipment is a reduced capability terminal equipment.

9 . The apparatus according to claim 1 , wherein the first control resource set and the second control resource set are control resource set 0 (CORESET 0).

10 . The apparatus according to claim 1 , wherein the system information is of system information block type 1 (SIB1).

11 . An apparatus, applicable to a terminal equipment, the apparatus comprising:

a memory; and

a processor coupled to the memory and configured to:

receive fourth indication information and fifth indication information transmitted by a network device, the fourth indication information being used to indicate first related information of a first initial bandwidth part (BWP), and the fifth indication information being used to indicate second related information of a second initial bandwidth part (BWP), and

receive a downlink channel and/or signal in the second initial bandwidth part indicated by the fifth indication information.

12 . The apparatus according to claim 11 , wherein the fourth indication information is contained in a system information block to indicate a location and bandwidth of the first initial bandwidth part (BWP).

13 . The apparatus according to claim 11 , wherein the fifth indication information is contained in a system information block to indicate second related information of a second initial bandwidth part (BWP) of a reduced capability terminal equipment, the second related information comprising a location and/or a bandwidth.

14 . The apparatus according to claim 11 , wherein the fifth indication information is contained in a radio resource control related message.

15 . The apparatus according to claim 11 , wherein the second initial bandwidth part covers a control resource set of the terminal equipment.

16 . The apparatus according to claim 11 , wherein the processor configured to receive a downlink channel and/or signal in the second initial bandwidth part after receiving a Radio Resource Control (RRC) message.

17 . An apparatus, applicable to a network device, the apparatus comprising:

a memory; and

a processor coupled to the memory and configured to:

transmit fourth indication information and fifth indication information to a terminal equipment, the fourth indication information being used to indicate first related information of a first initial bandwidth part (BWP), and the fifth indication information being used to indicate second related information of a second initial bandwidth part (BWP), and

transmit a downlink channel and/or signal in the second initial bandwidth part indicated by the fifth indication information.

18 . The apparatus according to claim 17 , wherein the fourth indication information is contained in a system information block to indicate a position and bandwidth of the first initial bandwidth part (BWP).

19 . The apparatus according to claim 17 , wherein the fifth indication information is contained in a system information block to indicate second related information of a second initial bandwidth part (BWP) of a reduced capability terminal equipment, the second related information comprising a position and/or a bandwidth.

20 . The apparatus according to claim 17 , wherein the second initial bandwidth part covers a control resource set of the terminal equipment, and

the processor is further configured to receive a downlink channel and/or signal in the second initial bandwidth part after receiving a Radio Resource Control (RRC) message.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 3, 2025
From: FUJITSU LIMITED
To: 1FINITY INC.
Reel/Frame 073477/0445 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2023
From: LI, GUORONG; JIA, MEIYI; JI, PENGYU; CHEN, ZHE; ZHANG, LEI
To: FUJITSU LIMITED
Reel/Frame 063287/0027 →