IP Library Granted Patent US 12,267,003
Granted Patent B2
US 12,267,003 · App. 18/145,267 · Granted Apr 1, 2025

Power converter and control method for power converter

Inventors: Jung-Sheng Chen (Zhunan Township, Miaoli County, TW); Chih-Chun Chuang (Taichung, TW); Yong-Chin Lee (Tainan, TW)
Assignee: RICHTEK TECHNOLOGY CORPORATION
H02M1/32H02M1/08H02M3/158H03K3/037H03K5/24
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Quick Facts
Patent No.
US 12,267,003
App. No.
18/145,267
Granted
Apr 1, 2025
Kind
B2
Abstract

A power converter that properly copes with the wiring defects on a feedback path is shown. According to a control signal, a power driver couples an input voltage to an energy storage element to provide an output voltage that is down-converted from the input voltage. The output voltage is further converted into a feedback voltage by a feedback circuit, and is entered to an error amplifier with a reference voltage for generation of an amplified error. A control signal generator generates the control signal of the power driver according to the amplified error. The power converter specifically has a comparator, which is enabled in a soft-start stage till the output voltage reaches a stable status. The comparator compares the amplified error with a critical value. When the amplified error exceeds the critical value, the input voltage is disconnected from the energy storage element.

Claims (59)

1. A power converter, down-converting an input voltage to an output voltage, comprising:

an energy storage element;

a power driver, driving the energy storage element to provide the output voltage by coupling the input voltage to the energy storage element according to a control signal;

a feedback circuit, generating a feedback voltage based on the output voltage;

an error amplifier, receiving the feedback voltage as well as a reference voltage for generation of an amplified error;

a control signal generator, generating the control signal based on the amplified error generated by the error amplifier, to provide the control signal to operate the power driver; and

a first comparator, enabled in a soft-start stage till the output voltage reaches a stable status, to compare the amplified error with a critical value;

wherein:

the input voltage is disconnected from the energy storage element when the first comparator enabled in the soft-start stage shows that the amplified error is greater than the critical value;

the control signal generator comprises a pulse width modulation signal generator and a second comparator, wherein the pulse width modulation signal generator generates a pulse width modulation signal to be transformed into the control signal for operating the power driver, and the second comparator compares the amplified error with a feedback current of the power converter to output a comparison result to the pulse width modulation signal generator to adjust a duty cycle of the pulse width modulation signal;

the power converter further comprises a current detector and a slope compensator, wherein the current detector detects a current generated while the input voltage is coupled to the energy storage element, and, the slope compensator compensates for a variation slope of the current detected by the current detector, to generate the feedback current to be coupled to the current detector;

the critical value depends on a direct-current voltage, a slope voltage, a current detection voltage, and a fault tolerance;

the direct-current voltage is a direct-current offset for an output range of the error amplifier;

the slope voltage depends on electrical characteristics of the slope compensator; and

the current detection voltage depends on electrical characteristics of the current detector.

2. The power converter as claimed in claim 1 , wherein:

the critical value further depends on a transform ratio between the output voltage and the input voltage, and a loading status.

3. The power converter as claimed in claim 1 , wherein:

the energy storage element includes an inductor;

the power driver includes a first transistor and a second transistor;

the first transistor is controlled by the pulse width modulation signal to couple the input voltage to the inductor; and

the second transistor is controlled by the pulse width modulation signal to couple the inductor to a ground terminal while the input voltage has been disconnected from the inductor.

4. The power converter as claimed in claim 3 , wherein:

the pulse width modulation signal generator has an S-R latch;

the S-R latch has an S input terminal receiving a clock signal, and an R input terminal coupled to an output terminal of the second comparator;

the S-R latch further has a Q output terminal and a Q output terminal; and

at least one of the Q output terminal and Q output terminal is coupled to the first transistor and the second transistor, to operate the first transistor and the second transistor according to the pulse width modulation signal.

5. The power converter as claimed in claim 4 , wherein:

the error amplifier uses a positive input terminal to receive the reference voltage, and a negative input terminal to receive the feedback voltage.

6. The power converter as claimed in claim 5 , wherein:

the first comparator has a positive input terminal coupled to the amplified error, and a negative input terminal coupled to the critical value.

7. The power converter as claimed in claim 6 , wherein:

the second comparator has a positive input terminal coupled to the feedback current, and a negative input terminal coupled to the amplified error.

8. The power converter as claimed in claim 7 , wherein:

the first transistor is a PMOS, having a gate terminal coupled to the Q output terminal of the S-R latch; and

the second transistor is an NMOS, having a gate terminal coupled to the Q output terminal of the S-R latch.

9. The power converter as claimed in claim 7 , wherein:

the first transistor is an NMOS, having a gate terminal coupled to the Q output terminal of the S-R latch; and

the second transistor is an NMOS, having a gate terminal coupled to the Q output terminal of the S-R latch.

10. The power converter as claimed in claim 7 , wherein:

the pulse width modulation signal generator further has a logic gate; and

the clock signal and an output signal of the first comparator are processed by the logic gate and then used in the control of the S input terminal of the S-R latch.

11. The power converter as claimed in claim 1 , wherein:

the input voltage is disconnected from the energy storage element after the first comparator detects that the amplified error has been greater than the critical value for longer than a predetermined time interval.

12. A control method for a power converter that down-converts an input voltage to an output voltage, comprising:

in a soft-start stage, comparing an amplified error generated by an error amplifier of the power converter with a critical value till the output voltage reaches a stable status; and

when the amplified error is greater than the critical value, disconnecting the input voltage from an energy storage element of the power converter;

wherein:

the power converter uses a feedback circuit to generate a feedback voltage based on the output voltage, the output voltage and a reference voltage are sent to the error amplifier to generate the amplified error, the amplified error is used in generation of a control signal, and a power driver of the power converter couples the input voltage to the energy storage element based on the control signal to drive the energy storage element to provide the output voltage;

the control signal is generated based on a pulse width modulation signal;

the amplified error is further compared with a feedback current of the power converter to adjust a duty cycle of the pulse width modulation signal;

the control method further comprises providing a current detector to detect a current generated by connecting the input voltage to the energy storage element, and providing a slope compensator to generate the feedback current to compensate for a variation slope of the current detected by the current detector;

the critical value depends on a direct-current voltage, a slope voltage, a current detection voltage, and a fault tolerance;

the direct-current voltage is a direct-current offset for an output range of the error amplifier;

the slope voltage depends on electrical characteristics of the slope compensator; and

the current detection voltage depends on electrical characteristics of the current detector.

13. The control method as claimed in claim 12 , wherein:

the critical value further depends on a transform ratio between the output voltage and the input voltage, and a loading status.

14. The control method as claimed in claim 12 , which switches to disconnect the input voltage from the energy storage element after detecting that the amplified error has been greater than the critical value for longer than a predetermined time interval.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2022
From: CHEN, JUNG-SHENG; CHUANG, CHIH-CHUN; LEE, YONG-CHIN
To: RICHTEK TECHNOLOGY CORPORATION
Reel/Frame 062184/0693 →
Continuity (1)
Related Publication 20240128853A1 · Apr 18, 2024
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