IP Library Granted Patent US 12,034,023
Granted Patent B2
US 12,034,023 · App. 18/149,862 · Granted Jul 9, 2024

Microlens structures for semiconductor device with single-photon avalanche diode pixels

Inventors: Marc Allen Sulfridge (Boise, ID); Swarnal Borthakur (Boise, ID); Nathan Wayne Chapman (Middleton, ID)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L27/14627H01L27/14643H01L27/14689H01L31/107
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,034,023
App. No.
18/149,862
Granted
Jul 9, 2024
Kind
B2
Abstract

An imaging device may include a plurality of single-photon avalanche diode (SPAD) pixels. The SPAD pixels may be overlapped by microlenses to direct light incident on the pixels onto photosensitive regions of the pixels and a containment grid with openings that surround each of the microlenses. During formation of the microlenses, the containment grid may prevent microlens material for adjacent SPAD pixels from merging. To ensure separation between the microlenses, the containment grid may be formed from material phobic to microlens material, or phobic material may be added over the containment grid material. Additionally, the containment grid may be formed from material that can absorb stray or off-angle light so that it does not reach the associated SPAD pixel, thereby reducing crosstalk during operation of the SPAD pixels.

Claims (32)

1. A semiconductor device, comprising:

a plurality of single-photon avalanche diode pixels, wherein each of the single-photon avalanche diode pixels has an active region and an inactive region;

a plurality of microlenses comprising microlens material, wherein each of the microlenses covers the active region of a respective one of the single-photon avalanche diode pixels;

a containment grid that covers the inactive regions of the single-photon avalanche diode pixels, wherein portions of the containment grid are interposed between adjacent microlenses of the plurality of microlenses, and wherein the portions of the containment grid each have a tapered shape between the microlenses; and

material that is phyllic to the microlens material on the containment grid.

2. The semiconductor device of claim 1 , wherein the material is interposed between at least some of the portions of the containment grid and the microlenses.

3. The semiconductor device of claim 1 , wherein the containment grid comprises containment grid material with a first index of refraction, the microlens material has a second index of refraction, and the second index of refraction is higher than the first index of refraction.

4. The semiconductor device of claim 1 , wherein the containment grid comprises a material selected from the group consisting of: metal material, metal oxide material, silicon material, and black material.

5. The semiconductor device of claim 1 , wherein the each of the microlenses has a first height, the containment grid has a second height, and the first height is greater than the second height.

6. The semiconductor device of claim 5 , wherein the first height is at least ten times greater than the second height.

7. The semiconductor device of claim 1 , wherein each of the portions of the containment grid has a top surface and side surfaces, and wherein the material that is phyllic to the microlens material is on the side surfaces.

8. The semiconductor device of claim 7 , wherein the top surface of each of the portions of the containment grid is free from the material that is phyllic to the microlens material.

9. A semiconductor device, comprising:

a plurality of single-photon avalanche diode pixels;

a plurality of microlenses that overlap the single-photon avalanche diode pixels, wherein the plurality of microlenses comprises microlens material;

a containment grid having portions that are interposed between adjacent microlenses of the plurality of microlenses; and

material that is phyllic to the microlens material on the containment grid, wherein the plurality of microlenses is coupled to the material that is phyllic to the microlens material.

10. The semiconductor device of claim 9 , wherein the material is interposed between the containment grid and the plurality of microlenses.

11. The semiconductor device of claim 10 , wherein the portions of the containment grid portions have top surfaces and side surfaces, and wherein the material is on the side surfaces.

12. The semiconductor device of claim 11 , wherein the containment grid includes an additional material that is phobic to the microlens material.

13. The semiconductor device of claim 12 , wherein the additional material is exposed at the top surfaces of the portions of the containment grid.

14. The semiconductor device of claim 13 , wherein the additional material is a light absorptive material.

15. A semiconductor device, comprising:

a semiconductor substrate;

a single-photon avalanche diode pixel in the semiconductor substrate and having an active region and an inactive region;

a containment grid on the semiconductor substrate and having portions that overlap the inactive region, wherein the containment grid has an opening that overlaps the active region;

a microlens in the opening of the containment grid, wherein the microlens overlaps the active region, and wherein the microlens comprises a microlens material; and

material that is phyllic to the microlens material on the containment grid.

16. The semiconductor device of claim 15 , wherein the single-photon avalanche diode pixel is a pixel in an array of single-photon avalanche diode pixels, and wherein the containment grid comprises containment grid material that is configured to absorb stray light and prevent cross talk between adjacent pixels in the array of pixels.

17. The semiconductor device of claim 16 , wherein the containment grid material comprises a light absorptive material.

18. The semiconductor device of claim 17 , wherein the light absorptive material is selected from the group of material consisting of: black material and metal oxide material.

19. The semiconductor device of claim 16 , wherein the containment grid material has a first index of refraction and wherein the microlens material has a second index of refraction that is greater than the first index of refraction.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 064502, FRAME 0293 Recorded Nov 14, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 065566/0488 →
SECURITY INTEREST Recorded May 9, 2023
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 065402/0293 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 4, 2023
From: SULFRIDGE, MARC ALLEN; BORTHAKUR, SWARNAL; CHAPMAN, NATHAN WAYNE
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 062272/0142 →
Continuity (2)
Division 16684033 · Nov 14, 2019
Related Publication 20230154959A1 · May 18, 2023