IP Library › Granted Patent US 11,863,743
Granted Patent B2
US 11,863,743 · App. 18/150,659 · Granted Jan 2, 2024

Encoder, decoder, encoding method, and decoding method

Inventors: Ryuichi Kanoh (Osaka, JP); Takahiro Nishi (Nara, JP); Tadamasa Toma (Osaka, JP); Kiyofumi Abe (Osaka, JP)
Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
H04N19/117H04N19/146H04N19/176
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Quick Facts
Patent No.
US 11,863,743
App. No.
18/150,659
Granted
Jan 2, 2024
Kind
B2
Abstract

A decoder comprises circuitry and memory. The circuitry, using the memory, in operation, determines a number of first pixels and a number of second pixels used in a deblocking filter process, wherein the first pixels are located at an upper side of a block boundary and the second pixels are located at a lower side of the block boundary, and performs the deblocking filter process on the block boundary. The number of the first pixels and the number of the second pixels are selected from among candidates, wherein the candidates include at least 4 and M larger than 4. Response to a location of the block boundary being a predetermined location, the number of the first pixels used in the deblocking filter process is limited to be 4.

Claims (20)

1. A decoder, comprising:

circuitry; and

memory, wherein

using the memory, the circuitry, in operation:

determines a number of first pixels and a number of second pixels used in a deblocking filter process, the first pixels located at an upper side of a block boundary and the second pixels located at a lower side of the block boundary, and

determines whether a location of the block boundary is an upper edge of a coding tree unit (CTU), and

performs the deblocking filter process on the block boundary;

wherein,

the number of the first pixels and the number of the second pixels are selected from among candidates, the candidates including at least 4 and M larger than 4, and

responsive to the location of the block boundary being the upper edge of the CTU, the number of the first pixels used in the deblocking filter process is limited to be 4.

2. An encoder, comprising:

circuitry; and

memory, wherein

using the memory, the circuitry:

determines a number of first pixels and a number of second pixels used in a deblocking filter process, the first pixels located at an upper side of a block boundary and the second pixels located at a lower side of the block boundary,

determines whether a location of the block boundary is an upper edge of a coding tree unit (CTU), and

performs the deblocking filter process on the block boundary;

wherein,

the number of the first pixels and the number of the second pixels are selected from among candidates, the candidates including at least 4 and M larger than 4, and

responsive to the location of the block boundary being the upper edge of the CTU, the number of the first pixels used in the deblocking filter process is limited to be 4.

Continuity (7)
Continuation 18150023 · Jan 4, 2023
Continuation 18149525 · Jan 3, 2023
Continuation 17227015 · Apr 9, 2021
Continuation 16809216 · Mar 4, 2020
Continuation PCTJP2019019453 · May 16, 2019
Provisional Application 62675303 · May 23, 2018
Related Publication 20230156188A1 · May 18, 2023