Memory controller including memory manager for mapping buffer identifier to segment
A memory controller includes a plurality of processors, a memory device and a memory manager. The memory device includes a plurality of segments, which are divided into a plurality of segment groups, to which group identifiers are respectively assigned. The memory manager is configured to map a first buffer identifier to a first group identifier from among the group identifiers, select one or more segments only from a first segment group, to which the first group identifier is assigned among the plurality of segment groups, map the first buffer identifier to the one or more segments, and allocate, to a first processor from among the plurality of processors, the first buffer identifier and the one or more segments.
1. A memory controller comprising:
a plurality of processors;
a memory device including a plurality of segments, which are divided into a plurality of segment groups, to which group identifiers are respectively assigned; and
a memory manager configured to:
map a first buffer identifier to a first group identifier from among the group identifiers,
select one or more segments only from a first segment group, to which the first group identifier is assigned among the plurality of segment groups, within a maximum allocation count corresponding to the first group identifier,
map the first buffer identifier to the one or more segments, and
allocate, to a first processor from among the plurality of processors, the first buffer identifier and the one or more segments.
2. The memory controller of claim 1 , wherein the memory manager is configured to:
manage maximum allocation counts respectively corresponding to the group identifiers.
3. The memory controller of claim 1 , wherein the memory manager is configured to select, when the first buffer identifier is mapped to the first group identifier, the one or more segments not from a segment group other than the first segment group among the plurality of segment groups.
4. The memory controller of claim 1 , wherein each of the group identifiers is mapped to one or more buffer identifiers.
5. The memory controller of claim 1 , wherein each of the segment groups includes segments of continuous segment indexes.
6. The memory controller of claim 1 ,
wherein the memory manager is configured to assign continuous slot indexes to the one or more segments, and
wherein the first processor is configured to access the one or more segments based on the first buffer identifier and the slot indexes.
7. The memory controller of claim 1 ,
wherein the memory manager includes sub-selecting units configured to select, in a parallel manner and from regions into which the plurality of segments is divided, the one or more segments to be mapped to the first buffer identifier, and
wherein each of the sub-selecting units is configured to:
identify segments, which are free and included in the first segment group, and
select, from among the identified segments, a segment to be mapped to the first buffer identifier.
8. The memory controller of claim 7 , wherein each of the sub-selecting units is configured to select, during a single operation cycle, at most a single segment from the corresponding region such that the sub-selecting units select the one or more segments in parallel while the operation cycle repeats.
9. The memory controller of claim 7 , wherein the memory manager includes:
a group masking unit configured to generate, based on a start segment index and an end segment index corresponding to the first group identifier, group masking information including masking values respectively corresponding to the plurality of segments, each of the masking values representing whether corresponding segment of the plurality of segments is included in the first segment group;
a pool information storage unit configured to store therein pool information including status values respectively corresponding to the plurality of segments, each of the status values representing whether corresponding segment of the plurality of segments is free; and
an operating unit configured to generate, based on the group masking information and the pool information, group pool information including result values respectively corresponding to the plurality of segments, each of the result values representing whether corresponding segment of the plurality of segments is free and included in the first segment group.
10. The memory controller of claim 9 ,
wherein the group pool information is divided into group pool information pieces respectively corresponding to the regions,
wherein the sub-selecting units are configured to receive the group pool information pieces, respectively, and
wherein each of the sub-selecting units is configured to identify, based on the correspondingly received one of the group pool information pieces, the segments that are free and included in the first segment group.
11. A memory controller comprising:
a memory device including segments, which are divided into regions; and
a memory manager including:
a group pool determining unit configured to generate group pool information representing segments mappable to a buffer identifier, the group pool information being divided into group pool information pieces respectively corresponding to the regions; and
sub-selecting units configured to receive the respective group pool information pieces and select, in parallel, from the respective regions, segments to be mapped to the buffer identifier based on the respective group pool information pieces.
12. The memory controller of claim 11 ,
wherein each of the sub-selecting units is configured to select, during a single operation cycle and based on the correspondingly received one of the group pool information pieces, at most a single segment to be mapped to the buffer identifier.
13. The memory controller of claim 12 , wherein the sub-selecting units are configured to select the segments to be mapped to the buffer identifier in a parallel manner while the operation cycle repeats.
14. The memory controller of claim 12 ,
wherein the memory manager is configured to allocate the buffer identifier to a processor and map the buffer identifier to a group identifier, and
wherein the group pool determining unit is configured to determine, as the segments mappable to the buffer identifier, segments that are free and included in a segment group to which the group identifier is assigned.
15. A memory controller comprising:
a plurality of processors;
a memory device including a plurality of segments, to which segment indexes are respectively assigned; and
a memory manager configured to:
re-arrange segments, to which one or more buffer identifiers are mapped,
map a virtual buffer identifier to the re-arranged segments,
assign continuous virtual slot indexes to the re-arranged segments, and
allocate the virtual buffer identifier to a first processor among the plurality of processors,
wherein the first processor is configured to access the re-arranged segments based on the virtual buffer identifier and the virtual slot indexes.
16. The memory controller of claim 15 ,
wherein the memory manager is configured to:
map a buffer identifier to one or more segments,
allocate the buffer identifier and the one or more segments to a second processor among the plurality of processors, and
assign continuous slot indexes to the one or more segments, and
wherein the second processor is configured to access the one or more segments based on the buffer identifier and the slot indexes.
17. The memory controller of claim 16 , wherein the memory manager is configured to manage a table corresponding to the buffer identifier, the table including a segment index mapped to each of the slot indexes.
18. The memory controller of claim 17 , wherein the memory manager is configured to:
receive, from the second processor, an access request including the buffer identifier and a slot index,
refer to the table corresponding to the buffer identifier to identify a segment index mapped to the slot index, and
access a segment, to which the segment index is assigned.
19. The memory controller of claim 15 , wherein the memory manager is configured to manage a table corresponding to the virtual buffer identifier, the table including a buffer identifier and a slot index both mapped to each of the virtual slot indexes.
20. The memory controller of claim 19 , wherein the memory manager is configured to:
receive, from the first processor, an access request including the virtual buffer identifier and a virtual slot index,
refer to the table corresponding to the virtual buffer identifier to identify a buffer identifier and a slot index both mapped to the virtual slot index,
refer to a table corresponding to the identified buffer identifier to identify a segment index mapped to the identified slot index, and
access a segment, to which the segment index is assigned.