Semiconductor device
A semiconductor device includes a first transistor, a first drive circuit including a second transistor, and a second drive circuit including a third transistor. The second transistor and the third transistor are connected in series; and a connection node of the second and third transistors is connected to a gate electrode of the first transistor. The first transistor, the second transistor, and the third transistor are normally-off MOS HEMTs formed in a first substrate that includes GaN. The first drive circuit charges a parasitic capacitance of the first transistor. The second drive circuit discharges the parasitic capacitance of the first transistor.
1. A semiconductor device, comprising:
a first transistor including
a first drain electrode connected to a drain electrode pad,
a first source electrode connected to a source electrode pad, and
a first gate electrode;
a first drive circuit connected to the source electrode pad and connected between a first electrode pad and a second electrode pad, a first voltage being input to the first electrode pad and used as a reference, a second voltage being input to the second electrode pad and being greater than the first voltage, the first drive circuit including a second transistor, the second transistor including
a second drain electrode electrically connected to the second electrode pad, and
a second source electrode connected to the first gate electrode of the first transistor; and
a second drive circuit connected between the second transistor and the first electrode pad, the second drive circuit including a third transistor, the third transistor including
a third drain electrode connected to the first gate electrode, and
a third source electrode connected to the source electrode pad,
the first transistor, the second transistor, and the third transistor being formed in a first substrate, the first substrate including GaN,
the first drive circuit charging a parasitic capacitance of the first transistor,
the second drive circuit discharging the parasitic capacitance of the first transistor, wherein
the second transistor further includes a second gate electrode,
the first drive circuit further includes a fourth transistor connected between the first electrode pad and the second gate electrode of the second transistor,
the second drive circuit further includes:
a fifth transistor included in a current mirror with the third transistor; and
a constant current source outputting a current to the fifth transistor, the current having a current value that is variably set.
2. The device according to claim 1 , wherein
the first drive circuit further includes:
a sixth transistor connected to the second drain electrode;
a seventh transistor included in a current mirror with the sixth transistor; and
a constant current circuit outputting a current to the seventh transistor, the current having a current value that is variably set.
3. The device according to claim 2 , wherein
the fifth transistor is formed in the first substrate,
the sixth transistor and the seventh transistor are formed in a second substrate, and
the second substrate includes Si.
4. The device according to claim 3 , wherein
the second transistor is connected to the sixth transistor via a first connection wire.
5. The device according to claim 1 , wherein
the first drive circuit outputs a first drive current to the first gate electrode,
a current value of the first drive current is settable,
the second drive circuit outputs a second drive current to the first gate electrode, and
a current value of the second drive current is settable.
6. The device according to claim 1 , wherein
the first transistor, the second transistor, and the third transistor are normally-off MOS HEMTS.
7. A semiconductor device, comprising:
a first transistor including
a first drain electrode connected to a drain electrode pad,
a first source electrode connected to a source electrode pad, and
a first gate electrode;
a first drive circuit connected to the source electrode pad and connected between a first electrode pad and a second electrode pad, a first voltage being input to the first electrode pad and used as a reference, a second voltage being input to the second electrode pad and being greater than the first voltage, the first drive circuit including a second transistor, the second transistor including
a second drain electrode electrically connected to the second electrode pad, and
a second source electrode connected to the first gate electrode of the first transistor; and
a second drive circuit connected between the second transistor and the first electrode pad, the second drive circuit including a third transistor, the third transistor including
a third drain electrode connected to the first gate electrode, and
a third source electrode connected to the source electrode pad,
the first transistor, the second transistor, and the third transistor being formed in a first substrate, the first substrate including GaN,
the first drive circuit charging a parasitic capacitance of the first transistor,
the second drive circuit discharging the parasitic capacitance of the first transistor, wherein
the first drive circuit includes a plurality of the second transistors connected in parallel, and
the device further comprises a first control circuit selectively driving at least one of the second transistors among the plurality of second transistors.
8. The device according to claim 7 , wherein
the first drive circuit further includes:
a fourth transistor connected to the second drain electrode;
a fifth transistor included in a current mirror with the fourth transistor; and
a constant current circuit outputting a current to the fifth transistor, the current having a current value that is variably set.
9. The device according to claim 8 , wherein
the fourth transistor and the fifth transistor are formed in a second substrate, and
the second substrate includes Si.
10. The device according to claim 9 , wherein
the second transistor is connected to the fourth transistor via a first connection wire.
11. The device according to claim 7 , wherein
the first drive circuit outputs a first drive current to the first gate electrode,
a current value of the first drive current is settable,
the second drive circuit outputs a second drive current to the first gate electrode, and
a current value of the second drive current is settable.
12. The device according to claim 7 , wherein
the first transistor, the second transistor, and the third transistor are normally-off MOS HEMTS.
13. A semiconductor device, comprising:
a first transistor including
a first drain electrode connected to a drain electrode pad,
a first source electrode connected to a source electrode pad, and
a first gate electrode;
a first drive circuit connected to the source electrode pad and connected between a first electrode pad and a second electrode pad, a first voltage being input to the first electrode pad and used as a reference, a second voltage being input to the second electrode pad and being greater than the first voltage, the first drive circuit including a second transistor, the second transistor including
a second drain electrode electrically connected to the second electrode pad, and
a second source electrode connected to the first gate electrode of the first transistor; and
a second drive circuit connected between the second transistor and the first electrode pad, the second drive circuit including a third transistor, the third transistor including
a third drain electrode connected to the first gate electrode, and
a third source electrode connected to the source electrode pad,
the first transistor, the second transistor, and the third transistor being formed in a first substrate, the first substrate including GaN,
the first drive circuit charging a parasitic capacitance of the first transistor,
the second drive circuit discharging the parasitic capacitance of the first transistor, wherein
the second drive circuit includes a plurality of the third transistors connected in parallel, and
the device further comprises a second control circuit selectively driving at least one of the third transistors among the plurality of third transistors.
14. The device according to claim 13 , wherein
the first drive circuit further includes:
a fourth transistor connected to the second drain electrode;
a fifth transistor included in a current mirror with the fourth transistor; and
a constant current circuit outputting a current to the fifth transistor, the current having a current value that is variably set.
15. The device according to claim 14 , wherein
the fourth transistor and the fifth transistor are formed in a second substrate, and
the second substrate includes Si.
16. The device according to claim 15 , wherein
the second transistor is connected to the fourth transistor via a first connection wire.
17. The device according to claim 13 , wherein
the first drive circuit outputs a first drive current to the first gate electrode,
a current value of the first drive current is settable,
the second drive circuit outputs a second drive current to the first gate electrode, and
a current value of the second drive current is settable.
18. The device according to claim 13 , wherein
the first transistor, the second transistor, and the third transistor are normally-off MOS HEMTS.
19. A semiconductor device, comprising:
a first transistor including
a first drain electrode connected to a drain electrode pad,
a first source electrode connected to a source electrode pad, a first voltage being applied to the source electrode pad and used as a reference, and
a first gate electrode;
a first drive circuit connected between a power supply electrode pad and the source electrode pad, a second voltage being input to the power supply electrode pad, the second voltage being greater than the first voltage, the first drive circuit including a second transistor, the second transistor including
a second drain electrode electrically connected to the power supply electrode pad, and
a second source electrode connected to the first gate electrode of the first transistor; and
a second drive circuit including a third transistor connected between the second transistor and the source electrode pad, the third transistor including
a third drain electrode connected to the first gate electrode, and
a third source electrode connected to the source electrode pad,
the first transistor, the second transistor, and the third transistor being normally-off MOS HEMTs,
the normally-off MOS HEMTs being formed in a first substrate,
the first substrate including GaN,
the first drive circuit charging a parasitic capacitance of the first transistor by outputting a first drive current to the first gate electrode,
the first drive current being variably set, wherein
the second transistor further includes a second gate electrode,
the first drive circuit further includes a fourth transistor connected between a first electrode pad and the second gate electrode of the second transistor,
the second drive circuit further includes:
a fifth transistor included in a current mirror with the third transistor; and
a constant current source outputting a current to the fifth transistor, the current having a current value that is variably set.