Hybrid core architecture

1 . An apparatus comprising:

one or more substrates; and

circuitry coupled to the one or more substrates, wherein the circuitry is implemented at least partly in one or more of configurable or fixed-functionality hardware, the circuitry to:

determine a selected priority corresponding to a selected region in the microprocessor;

determine an adjacent priority corresponding to an adjacent region in the microprocessor, wherein the adjacent region is adjacent to the selected region; and

place the adjacent region in a first reduced power state if the selected priority is greater than the adjacent priority and a temperature of the selected region is less than a selected temperature threshold associated with the selected region.

2 . The apparatus of claim 1 , wherein the circuitry is further to:

detect that the temperature of the selected region has reached the selected temperature threshold;

place the selected region in a second reduced power state in response to the temperature of the selected region reaching the selected temperature threshold; and

maintain the adjacent region in the first reduced power state while the selected region is in the second reduced power state.

3 . The apparatus of claim 2 , wherein the second reduced power state consumes less power than the first reduced power state.

4 . The apparatus of claim 1 , wherein the selected priority and the adjacent priority are determined based on one or more of load balancing data or efficiency data.

5 . The apparatus of claim 1 , wherein the circuitry is further to detect that the adjacent region is adjacent to the selected region based on a proximity data structure.

6 . The apparatus of claim 1 , wherein to place the adjacent region in the first reduced power state, the circuitry is to reduce a frequency of the adjacent region.

7 . The apparatus of claim 1 , wherein to place the adjacent region in the first reduced power state, the circuitry is to reduce a voltage of the adjacent region.

8 . The apparatus of claim 1 , wherein the circuitry is further to reduce an adjacent temperature threshold associated with the adjacent region to an intermediate temperature threshold.

9 . The apparatus of claim 1 , further including a network controller.

10 . At least one non-transitory computer readable storage medium comprising a set of instructions, which when executed by a microprocessor, cause the microprocessor to: determine a selected priority corresponding to a selected region in the microprocessor; determine an adjacent priority corresponding to an adjacent region in the microprocessor, wherein the adjacent region is adjacent to the selected region; and place the adjacent region in a first reduced power state if the selected priority is greater than the adjacent priority and the selected region has not reached a selected temperature threshold associated with the selected region.

11 . The at least one non-transitory computer readable storage medium of claim 10 , wherein the instructions, when executed, further cause the microprocessor to: detect that the selected region has reached the selected temperature threshold; place the selected region in a second reduced power state in response to the selected region reaching the selected temperature threshold; and maintain the adjacent region in the first reduced power state while the selected region is in the second reduced power state.

12 . The at least one non-transitory computer readable storage medium of claim 11 , wherein the second reduced power state consumes less power than the first reduced power state.

13 . The at least one non-transitory computer readable storage medium of claim 10 , wherein the selected priority and the adjacent priority are determined based on one or more of load balancing data or efficiency data.

14 . The at least one non-transitory computer readable storage medium of claim 10 , wherein the instructions, when executed, further cause the microprocessor to detect that the adjacent region is adjacent to the selected region based on a proximity data structure.

15 . The at least one non-transitory computer readable storage medium of claim 10 , wherein to place the adjacent region in the first reduced power state, the instructions are to reduce one or more of a frequency or a voltage of the adjacent region.

16 . The at least one non-transitory computer readable storage medium of claim 10 , wherein the instructions, when executed, further reduce an adjacent temperature threshold associated with the adjacent region to an intermediate temperature threshold.

17 . A method comprising:

determining a selected priority corresponding to a selected region in a microprocessor;

determining an adjacent priority corresponding to an adjacent region in the microprocessor, wherein the adjacent region is adjacent to the selected region; and

placing the adjacent region in a first reduced power state if the selected priority is greater than the adjacent priority and a temperature of the selected region is less than a selected temperature threshold associated with the selected region.

18 . The method of claim 17 , further comprising:

detecting that the temperature of the selected region has reached the selected temperature threshold;

placing the selected region in a second reduced power state in response to the temperature of the selected region reaching the selected temperature threshold; and

maintaining the adjacent region in the first reduced power state while the selected region is in the second reduced power state.

19 . The method of claim 18 , wherein the second reduced power state consumes less power than the first reduced power state.

20 . The method of claim 17 , wherein the selected priority and the adjacent priority are determined based on one or more of load balancing data or efficiency data.