IP Library Patent Application 18172904
Patent Application
App. No. 18/172,904

PROTECTION DAM FOR A POWER MODULE WITH SPACERS

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Quick Facts
Patent No.
US None
App. No.
18/172,904
Abstract

A protective dam can relieve stress in a chip assembly of a high-power semiconductor device module used in electric vehicle or industrial applications. Some chip assemblies that incorporate copper spacers for thermal dissipation can cause the device module to become vulnerable to cracking. Adding a protective dam can absorb stress to prevent damage to materials surrounding the chip assembly. Various types of protective dams are presented, including high profile flexible protective dams, low profile flexible protective dams, metallic protective dams, and integral protective dams. The protective dams can be incorporated into a high-power semiconductor device module that features single sided or dual sided cooling via direct bond metal structures.

Claims (45)

1 . An apparatus, comprising:

a substrate;

a chip assembly coupled to the substrate, the chip assembly including:

a semiconductor die,

a heat sink, and

a molding material coupled to the heat sink; and

a protection dam surrounding at least a portion of a perimeter of the chip assembly.

2 . The apparatus of claim 1 , wherein the protection dam is configured to absorb mechanical stress from expansion of the heat sink.

3 . The apparatus of claim 1 , wherein the protection dam includes a flexible material.

4 . The apparatus of claim 3 , wherein the protection dam includes a barrier configured to block a flow of solder.

5 . The apparatus of claim 3 , wherein the protection dam forms a seal against the substrate.

6 . The apparatus of claim 1 , wherein the protection dam includes copper.

7 . The apparatus of claim 6 , wherein the substrate is a direct bonded metal (DBM) substrate, including a first metal layer, a second metal layer, and an insulating layer disposed between the first metal layer and the second metal layer, the protection dam being a recessed copper layer integrated in the first metal layer.

8 . The apparatus of claim 6 , wherein the chip assembly is a first chip assembly, and further comprising a second chip assembly coupled to the substrate, wherein the protection dam encompasses both chip assemblies.

9 . The apparatus of claim 1 , wherein the chip assembly is a first chip assembly, the apparatus further comprising a second chip assembly coupled to the substrate, the second chip assembly being disposed outside the protection dam.

10 . The apparatus of claim 1 , wherein the semiconductor die is coupled to the heat sink by a sintered layer of silver (Ag).

11 . The apparatus of claim 1 , wherein the chip assembly is a component of a high-power module configured for use in an automotive system.

12 . An apparatus, comprising:

a substrate;

a die assembly coupled to the substrate, the die assembly including copper components in contact with a polymer layer; and

a protection dam disposed around the die assembly.

13 . The apparatus of claim 12 , wherein the protection dam is attached to the substrate.

14 . The apparatus of claim 12 , wherein the protection dam is integrated into the substrate.

15 . The apparatus of claim 12 , wherein the protection dam includes a recessed area of the substrate.

16 . The apparatus of claim 12 , wherein the protection dam includes an extension configured as a solder barrier.

17 . A method, comprising:

forming a chip assembly that includes a semiconductor die and a copper spacer;

forming a protective dam around the chip assembly;

coupling a substrate to a lead frame;

coupling the chip assembly to the substrate;

forming a direct bond metal (DBM) layer above the chip assembly;

forming wire bonds to leads of the lead frame; and

filling remaining space around the chip assembly with a molding compound.

18 . The method of claim 17 , wherein forming the protective dam around the chip assembly includes attaching the protective dam to the substrate.

19 . The method of claim 18 , wherein the protective dam is flexible and attaching the protective dam to the substrate includes applying pressure to the protective dam.

20 . The method of claim 17 , wherein attaching the protective dam to the substrate includes applying an adhesive.

21 . The method of claim 17 , wherein the protective dam is metallic and attaching the protective dam to the substrate includes soldering.

22 . The method of claim 21 , wherein forming the protective dam comprises forming a solder barrier integral to the protective dam.

23 . A method, comprising:

fabricating a chip assembly that includes a semiconductor die and a copper spacer;

etching a recessed area in a surface metal layer of a substrate to form a protective dam;

coupling the chip assembly to the substrate inside the protective dam;

forming a direct bond metal (DBM) layer above the chip assembly; and

filling remaining space around the chip assembly with a molding compound.

24 . The method of claim 23 , further comprising coupling additional chip assemblies to the substrate, and wherein etching the recessed area forms a protective dam around at least one of the additional chip assemblies.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 064502, FRAME 0293 Recorded Nov 14, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 065566/0488 →
SECURITY INTEREST Recorded May 9, 2023
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 065402/0293 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2023
From: LIU, YONG; CHEN, LIANGBIAO; LIN, YUSHENG; CHEW, CHEE HIONG
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 062772/0644 →