Display device
A display device includes: a display panel including pixels; a data driver configured to output data voltages to the pixels; a gate driver configured to output a write gate signal to write the data voltages to the pixels having an inactivation level in a frame stop period; a timing controller configured to control the data driver and the gate driver; and a voltage generator configured to apply a first bias voltage to first pixels to which the data voltages are written before the frame stop period among the pixels, and to apply a second bias voltage to second pixels to which the data voltages are written after the frame stop period among the pixels.
1 . A display device comprising:
a display panel including pixels;
a data driver configured to output data voltages to the pixels;
a gate driver configured to output a write gate signal to write the data voltages to the pixels having an inactivation level in a frame stop period;
a timing controller configured to control the data driver and the gate driver;
an emission driver configured to output an emission signal to the pixels; and
a voltage generator configured to apply a first bias voltage to first pixels to which the data voltages are written before the frame stop period among the pixels, and to apply a second bias voltage to second pixels, different from the first pixels and to which the first bias voltage is not applied, to which the data voltages are written after the frame stop period among the pixels,
wherein each of the pixels includes a driving transistor,
wherein the gate driver is configured to output a bias gate signal to the pixels,
wherein the first bias voltage is applied to the driving transistor of each of the first pixels in response to the bias gate signal,
wherein the second bias voltage is applied to the driving transistor of each of the second pixels in response to the bias gate signal,
wherein the timing controller is configured to maintain an output of the emission signal in the frame stop period,
wherein the timing controller is configured to maintain an output of the bias gate signal in the frame stop period, and
wherein a time between an activation timing of the bias gate signal and an activation timing of the emission signal is constant.
2 . The display device of claim 1 , wherein the second bias voltage is smaller than the first bias voltage.
3 . The display device of claim 1 , wherein the bias gate signal has an inactivation level in the frame stop period.
4 . The display device of claim 1 , wherein the voltage generator is configured to apply a first gate initialization voltage to the first pixels and to apply a second gate initialization voltage to the second pixels,
wherein the gate driver is configured to output an initialization gate signal to the pixels,
wherein the first gate initialization voltage is applied to a control electrode of the driving transistor of each of the first pixels in response to the initialization gate signal, and
wherein the second gate initialization voltage is applied to the control electrode of the driving transistor of each of the second pixels in response to the initialization gate signal.
5 . The display device of claim 4 , wherein the second gate initialization voltage is greater than the first gate initialization voltage.
6 . The display device of claim 4 , wherein the initialization gate signal has an inactivation level in the frame stop period.
7 . The display device of claim 1 , wherein the voltage generator is configured to apply a first anode initialization voltage to the first pixels and to apply a second anode initialization voltage to the second pixels,
wherein each of the pixels includes a light emitting element,
wherein the first anode initialization voltage is applied to the light emitting element of each of the first pixels in response to the bias gate signal, and
wherein the second anode initialization voltage is applied to the light emitting element of each of the second pixels in response to the bias gate signal.
8 . The display device of claim 7 , wherein the second anode initialization voltage is smaller than the first anode initialization voltage.
9 . The display device of claim 1 , wherein the timing controller is configured to perform a touch sensing operation in the frame stop period.
10 . A display device comprising:
a display panel including pixels;
a data driver configured to output data voltages to the pixels;
a gate driver configured to output a write gate signal to write the data voltages to the pixels having an inactivation level in a frame stop period;
a timing controller configured to control the data driver and the gate driver; and
a voltage generator configured to apply a first bias voltage to first pixels from among the pixels and to apply a second bias voltage to second pixels, different from the first pixels and to which the first bias voltage is not applied, after the frame stop period,
wherein the voltage generator is configured to apply a gate initialization voltage to the pixels, and to vary the gate initialization voltage after the frame stop period,
wherein each of the pixels includes a driving transistor,
wherein the gate driver is configured to output an initialization gate signal to the pixels, and
wherein the gate initialization voltage is applied to a control electrode of the driving transistor of each of the pixels in response to the initialization gate signal.
11 . The display device of claim 10 , wherein the second bias voltage is lower than the first bias voltage.
12 . The display device of claim 10 wherein the voltage generator is configured to increase the gate initialization voltage after the frame stop period.
13 . A display device comprising:
a display panel including pixels;
a data driver configured to output data voltages to the pixels;
a gate driver configured to output a write gate signal to write the data voltages to the pixels having an inactivation level in a frame stop period;
a timing controller configured to control the data driver and the gate driver; and
a voltage generator configured to apply a first bias voltage to first pixels from among the pixels and to apply a second bias voltage to second pixels, different from the first pixels and to which the first bias voltage is not applied, after the frame stop period,
wherein the voltage generator is configured to apply an anode initialization voltage to the pixels, and to vary the anode initialization voltage after the frame stop period,
wherein each of the pixels includes a light emitting element,
wherein the gate driver is configured to output a bias gate signal to the pixels, and
wherein the anode initialization voltage is applied to the light emitting element of each of the pixels in response to the bias gate signal.
14 . The display device of claim 13 , wherein the voltage generator is configured to decrease the anode initialization voltage after the frame stop period.
15 . A display device comprising:
a display panel including pixels;
a data driver configured to output data voltages to the pixels;
a gate driver configured to output a write gate signal to write the data voltages to the pixels having an inactivation level in a frame stop period and to output a bias gate signal to apply a bias voltage to a driving transistor included in each of the pixels having an activation level;
an emission driver configured to output an emission signal to the pixels;
a timing controller configured to control the data driver, the gate driver, and the emission driver; and
a voltage generator configured to apply the bias voltage to the pixels,
wherein a time between an activation timing of the bias gate signal and an activation timing of the emission signal is constant.