IP Library Granted Patent US 12,477,854
Granted Patent B2
US 12,477,854 · App. 18/180,511 · Granted Nov 18, 2025

Image sensor signal path routing

Inventors: Nicholas Paul Cowley (Wroughton, GB); Andrew David Talbot (Chieveley, GB); Stephen James Spinks (Shrivenham, GB)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H10F39/811H04N25/702H04N25/703H04N25/78H10F39/182H04N25/633
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,477,854
App. No.
18/180,511
Granted
Nov 18, 2025
Kind
B2
Abstract

An image sensor may include an image sensor pixel array. The image sensor pixel array may include active image sensor pixels and non-active image sensor pixels. A line of peripheral image sensor pixels may be coupled to a corresponding interconnect structure via a pixel signal path. The pixel signal path may include portions that overlap pass-through pixels and a keep-out region beyond an edge of the image sensor pixel array. Multiple interconnect structures may connect the image sensor pixel array implemented on a first integrated circuit die to pixel control and readout circuitry on a second integrated circuit die.

Claims (40)

1 . An image sensor comprising:

an array of image sensor pixels having a first line of pixels and a second line of pixels;

a keep-out region that surrounds the array of image sensor pixels; and

a pixel signal path coupled to the first line of pixels, the pixel signal path having a first path portion that overlaps the keep-out region and a second path portion that overlaps at least one pixel in the second line of pixels.

2 . The image sensor defined in claim 1 further comprising:

pixel readout circuitry, wherein the pixel signal path comprises a pixel readout path coupling the first line of pixels to the pixel readout circuitry.

3 . The image sensor defined in claim 2 , wherein the first line of pixels comprises a first column of pixels and wherein the second line of pixels comprises a second column of pixels parallel to the first column of pixels.

4 . The image sensor defined in claim 1 further comprising:

pixel control circuitry, wherein the pixel signal path comprises a pixel control path coupling the first line of pixels to the pixel control circuitry.

5 . The image sensor defined in claim 4 , wherein the first line of pixels comprises a first row of pixels and wherein the second line of pixels comprises a second row of pixels parallel to the first row of pixels.

6 . The image sensor defined in claim 1 further comprising:

an inter-die interconnect structure, wherein the pixel signal path couples the first line of pixels to the inter-die interconnect structure.

7 . The image sensor defined in claim 6 , wherein the array of image sensor pixels, the keep-out region, the pixel signal path, and the inter-die interconnect structure are formed on a first integrated circuit die and wherein the image sensor comprises a second integrated circuit die to which the first integrated circuit die is attached and to which the inter-die interconnect structure is coupled.

8 . The image sensor defined in claim 1 , wherein the first line of pixels comprises non-active pixels.

9 . The image sensor defined in claim 8 , wherein the non-active pixels comprise reference pixels that generate reference signals indicative of pixel array noise.

10 . The image sensor defined in claim 8 , wherein the non-active pixels comprise optically dark pixels that are shielded from incident light.

11 . The image sensor defined in claim 1 , wherein the at least one pixel in the second line of pixels comprises a non-operational pixel having one or more pixel transistors having grounded terminals.

12 . The image sensor defined in claim 11 , wherein the second path portion comprises a pixel control line portion overlapping the non-operational pixel or a pixel readout line portion overlapping the non-operational pixel.

13 . The image sensor defined in claim 1 , wherein the array of image sensor pixels comprises active pixels and non-active pixels.

14 . The image sensor defined in claim 13 , wherein the array of image sensor pixels has peripheral edges that define an outline of the array of image sensor pixels, wherein the keep-out region is beyond the peripheral edges of the array of image sensor pixels, and wherein the first path portion of the pixel signal path extends beyond at least one of the peripheral edges of the array of image sensor pixels.

15 . The image sensor defined in claim 1 further comprising:

a set of interconnect structures perpendicular to the first line of pixels and perpendicular to the second line of pixels.

16 . The image sensor defined in claim 15 , wherein the pixel signal path couples the first line of pixels to a given interconnect structure in the set of interconnect structures.

17 . The image sensor defined in claim 15 further comprising:

an additional set of interconnect structures parallel to the first line of pixels and parallel to the second line of pixels.

18 . The image sensor defined in claim 17 further comprising

a first integrated circuit die on which the array of image sensor pixels, the keep-out region, and the pixel signal path are disposed;

a second integrated circuit die coupled to the first integrated circuit die via the set of interconnect structures and the additional set of interconnect structures.

19 . An image sensor comprising:

a first integrated circuit die that includes:

an array of image sensor pixels having a first row of pixels and a second row of pixels;

a region that surrounds the array of image sensor pixels; and

a pixel signal path coupled to multiple pixels in the first row of pixels, the pixel signal path having a first path portion that overlaps the region and a second path portion that overlaps at least one pixel in the second row of pixels; and

a second integrated circuit die attached to the first integrated circuit die.

20 . An image sensor comprising:

a first integrated circuit die that includes:

an array of image sensor pixels having a first column of pixels and a second column of pixels;

a region that surrounds the array of image sensor pixels; and

a pixel signal path coupled to multiple pixels in the first column of pixels, the pixel signal path having a first path portion that overlaps the region and a second path portion that overlaps at least one pixel in the second column of pixels; and

a second integrated circuit die attached to the first integrated circuit die.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 064502, FRAME 0293 Recorded Nov 14, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 065566/0488 →
SECURITY INTEREST Recorded May 9, 2023
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 065402/0293 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2023
From: COWLEY, NICHOLAS PAUL; TALBOT, ANDREW DAVID; SPINKS, STEPHEN JAMES
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 063315/0037 →
Continuity (1)
Related Publication 20240304647A1 · Sep 12, 2024
References Cited (10)
US 20130200396A1 · Zheng · 2013 [cited by examiner]
US 20140077063A1 · Cho · 2014 [cited by applicant]
US 20150189214A1 · Kurose · 2015 [cited by examiner]
US 20170169265A1 · Wang · 2017 [cited by applicant]
US 20190057995A1 · Liu · 2019 [cited by applicant]
US 20190104271A1 · Isoda · 2019 [cited by examiner]
US 20190165014A1 · Wada · 2019 [cited by examiner]
US 20190253653A1 · Nakamura · 2019 [cited by examiner]
US 20200288954A1 · Blanquart · 2020 [cited by applicant]
US 20220415951A1 · Gu · 2022 [cited by examiner]