IP Library › Granted Patent US 12,732,108
Granted Patent B2
US 12,732,108 · App. 18/214,433 · Granted Sep 8, 2026

Systems and methods for driving bipolar transistors related to power converters by at least using three switches

Inventors: Xiuhong Zhang (Shanghai, CN); Lieyi Fang (Shanghai, CN)
Assignee: ON-BRIGHT ELECTRONICS (SHANGHAI) CO., LTD.
H02M3/335H02M1/088H02M1/32H02M3/33507
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Quick Facts
Patent No.
US 12,732,108
App. No.
18/214,433
Granted
Sep 8, 2026
Kind
B2
Abstract

Controller and method for a power converter. For example, a controller for a power converter, the controller comprising: a first controller terminal connected to a first base of a first bipolar transistor, the first bipolar transistor further including a first collector and a first emitter; a second controller terminal connected to the first emitter of the first bipolar transistor and a second base of a second bipolar transistor, the second bipolar transistor further including a second collector and a second emitter, the second collector being connected to the first collector; a third controller terminal connected to a first resistor terminal of a resistor, the resistor further including a second resistor terminal; a fourth controller terminal connected to the second resistor terminal and also connected through a first transistor to the second emitter of the second bipolar transistor.

Claims (75)

1 . A controller for a power converter, the controller comprising:

a first controller terminal connected to a first base of a first bipolar transistor, the first bipolar transistor further including a first collector and a first emitter;

a second controller terminal connected to the first emitter of the first bipolar transistor and a second base of a second bipolar transistor, the second bipolar transistor further including a second collector and a second emitter, the second collector being connected to the first collector;

a third controller terminal connected to a first resistor terminal of a resistor, the resistor further including a second resistor terminal; and

a fourth controller terminal connected to the second resistor terminal and also connected through a first transistor to the second emitter of the second bipolar transistor, the resistor being configured to generate a sensing voltage received by the third controller terminal with respect to a controller ground voltage at the fourth controller terminal;

wherein:

if an absolute value of the sensing voltage with respect to the controller ground voltage is smaller than a predetermined threshold, the first controller terminal is configured to output a first current to the first base to generate a second current at the first emitter, the second current flowing from the first emitter to the second base to turn on the second bipolar transistor; and

if the absolute value of the sensing voltage with respect to the controller ground voltage reaches the predetermined threshold, the first controller terminal is configured to stop the second current from flowing from the first emitter to the second base and the second controller terminal is configured to make a base voltage at the second base of the second bipolar transistor floating before the second bipolar transistor becomes turned off.

2 . The controller of claim 1 wherein:

the first current is smaller than the second current in magnitude.

3 . The controller of claim 1 wherein, if the absolute value of the sensing voltage with respect to the controller ground voltage reaches the predetermined threshold, the first controller terminal is configured to reduce the first current to zero to turn off the first bipolar transistor and also reduce the second current to zero.

4 . A controller for a power converter, the controller comprising:

a current source configured to generate a first current;

a first transistor including a first transistor terminal, a second transistor terminal, and a third transistor terminal, the first transistor terminal being connected to the current source;

a second transistor including a fourth transistor terminal, a fifth transistor terminal, and a sixth transistor terminal, the fourth transistor terminal being connected to the third transistor terminal;

a third transistor including a seventh transistor terminal, an eighth transistor terminal, and a ninth transistor terminal, the seventh transistor terminal being connected to the sixth transistor terminal; and

a drive voltage generator configured to:

output a first drive voltage to the second transistor terminal of the first transistor;

output a second drive voltage to the fifth transistor terminal of the second transistor; and

output a third drive voltage to the eighth transistor terminal of the third transistor;

wherein the drive voltage generator is further configured to, at a first same time,

output the first drive voltage to turn off the first transistor;

output the second drive voltage to turn on the second transistor; and

output the third drive voltage to turn off the third transistor.

5 . The controller of claim 4 wherein the sixth transistor terminal of the second transistor is connected to the seventh transistor terminal of the third transistor.

6 . The controller of claim 4 wherein the sixth transistor terminal of the second transistor is biased to a controller ground voltage.

7 . The controller of claim 4 wherein the drive voltage generator is further configured to, at a second same time,

output the first drive voltage to turn on the first transistor;

output the second drive voltage to turn off the second transistor; and

output the third drive voltage to turn off the third transistor.

8 . The controller of claim 4 wherein the drive voltage generator is further configured to, at a second same time,

output the first drive voltage to turn off the first transistor;

output the second drive voltage to turn on the second transistor; and

output the third drive voltage to turn on the third transistor.

9 . The controller of claim 4 wherein the third transistor terminal and the fourth transistor terminal are both connected to a first base of a first bipolar transistor, the first bipolar transistor further including a first collector and a first emitter.

10 . The controller of claim 9 wherein the sixth transistor terminal and the seventh transistor terminal are both connected to the first emitter of the first bipolar transistor and a second base of a second bipolar transistor, the second bipolar transistor further including a second collector and a second emitter, the second collector being connected to the first collector, the second emitter being connected, through a transistor, to a resistor configured to generate a sensing voltage received by the controller with respect to a controller ground voltage.

11 . The controller of claim 10 wherein the drive voltage generator is further configured to, if an absolute value of the sensing voltage with respect to the controller ground voltage is smaller than a first predetermined threshold:

output the first drive voltage to turn on the first transistor;

output the second drive voltage to turn off the second transistor; and

output the third drive voltage to turn off the third transistor.

12 . The controller of claim 11 wherein the drive voltage generator is further configured to, if the absolute value of the sensing voltage with respect to the controller ground voltage reaches the first predetermined threshold:

output the first drive voltage to turn off the first transistor;

output the second drive voltage to turn on the second transistor; and

output the third drive voltage to turn off the third transistor.

13 . The controller of claim 12 wherein the drive voltage generator is further configured to, if the absolute value of the sensing voltage with respect to the controller ground voltage reaches a second predetermined threshold:

output the first drive voltage to turn off the first transistor;

output the second drive voltage to turn on the second transistor; and

output the third drive voltage to turn on the third transistor;

wherein the second predetermined threshold is larger than the first predetermined threshold.

14 . The controller of claim 4 wherein each transistor of the first transistor, the second transistor, and the third transistor is a MOSFET.

15 . A method for a power converter, the method comprising:

receiving a sensing voltage from a resistor with respect to a controller ground voltage;

if an absolute value of the sensing voltage with respect to the controller ground voltage is smaller than a predetermined threshold, outputting a first current to a first base of a first bipolar transistor to generate a second current at a first emitter of the first bipolar transistor, the first emitter of the first bipolar transistor being connected to a second base of a second bipolar transistor, the second current flowing to the second base to turn on the second bipolar transistor, the first bipolar transistor further including a first collector, the second bipolar transistor further including a second collector and a second emitter, the second collector being connected to the first collector, the second emitter being connected to the resistor through a transistor; and

if the absolute value of the sensing voltage with respect to the controller ground voltage reaches the predetermined threshold, stopping the second current from flowing from the first emitter to the second base and making a base voltage at the second base of the second bipolar transistor floating before the second bipolar transistor becomes turned off.

16 . The method of claim 15 wherein the stopping the second current from flowing from the first emitter to the second base includes:

reducing the first current to zero to turn off the first bipolar transistor; and

reducing the second current to zero.

17 . A method for a power converter, the method comprising:

outputting a first drive voltage to a first transistor including a first transistor terminal, a second transistor terminal, and a third transistor terminal, the first transistor terminal being connected to a current source configured to generate a first current, the second transistor terminal being configured to receive the first drive voltage;

outputting a second drive voltage to a second transistor, the second transistor including a fourth transistor terminal, a fifth transistor terminal, and a sixth transistor terminal, the fourth transistor terminal being connected to the third transistor terminal, the fifth transistor terminal configured to receive the second drive voltage;

outputting a third drive voltage to a third transistor, the third transistor including a seventh transistor terminal, an eighth transistor terminal, and a ninth transistor terminal, the seventh transistor terminal being connected to the sixth transistor terminal, the eighth transistor terminal being configured to receive the third drive voltage; and

receiving a sensing voltage with respect to a controller ground voltage from a resistor connected directly to a transistor and also connected, through the transistor, to a second emitter of a second bipolar transistor, the second bipolar transistor further including a second base and a second collector, the second collector being connected to a first collector of a first bipolar transistor, the first bipolar transistor further including a first base and a first emitter, the first emitter being connected to the second base.

18 . The method of claim 17 , and further comprising, if an absolute value of the sensing voltage with respect to the controller ground voltage is smaller than a first predetermined threshold:

outputting the first drive voltage to turn on the first transistor;

outputting the second drive voltage to turn off the second transistor; and

outputting the third drive voltage to turn off the third transistor.

19 . The method of claim 18 , and further comprising, if the absolute value of the sensing voltage with respect to the controller ground voltage reaches the first predetermined threshold:

outputting the first drive voltage to turn off the first transistor;

outputting the second drive voltage to turn on the second transistor; and

outputting the third drive voltage to turn off the third transistor.

20 . The method of claim 19 , and further comprising, if the absolute value of the sensing voltage with respect to the controller ground voltage reaches a second predetermined threshold:

outputting the first drive voltage to turn off the first transistor;

outputting the second drive voltage to turn on the second transistor; and

outputting the third drive voltage to turn on the third transistor;

wherein the second predetermined threshold is larger than the first predetermined threshold.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2024
From: ZHANG, XIUHONG; FANG, LIEYI
To: ON-BRIGHT ELECTRONICS (SHANGHAI) CO., LTD.
Reel/Frame 066187/0182 →
Priority Claims (1)
CN 202210737276.2 · Jun 27, 2022 · national
Continuity (1)
Related Publication 20240006999A1 · Jan 4, 2024
References Cited (86)
US 6212084B1 · Turner · 2001 [cited by examiner]
US 8693223B2 · Lin · 2014 [cited by applicant]
US 9166490B2 · Yu et al. · 2015 [cited by applicant]
US 9537396B2 · Knoedgen · 2017 [cited by applicant]
US 9843263B2 · Zhai et al. · 2017 [cited by applicant]
US 10090688B2 · Houston et al. · 2018 [cited by applicant]
US 11181966B2 · Waters et al. · 2021 [cited by applicant]
US 11303218B2 · Chen et al. · 2022 [cited by applicant]
US 20070139095A1 · Fang · 2007 [cited by examiner]
US 20090040796A1 · Lalithambika et al. · 2009 [cited by applicant]
US 20140056036A1 · Pan et al. · 2014 [cited by applicant]
US 20140146575A1 · Tse et al. · 2014 [cited by applicant]
US 20140286057A1 · Ho et al. · 2014 [cited by applicant]
US 20170317577A1 · Zhang et al. · 2017 [cited by applicant]
US 20180177009A1 · Zhang et al. · 2018 [cited by applicant]
US 20220364488A1 · Stoltz · 2022 [cited by applicant]
US 20230299607A1 · Yang · 2023 [cited by examiner]
US 20230299608A1 · Huang · 2023 [cited by examiner]
US 20230299766A1 · Huang · 2023 [cited by examiner]
US 20230369963A1 · Zhang et al. · 2023 [cited by applicant]
US 20240204554A1 · Wang et al. · 2024 [cited by applicant]
US 20240235223A1 · Zheng et al. · 2024 [cited by applicant]
US 20240235224A1 · Zheng et al. · 2024 [cited by applicant]
US 20250253686A1 · Zheng et al. · 2025 [cited by applicant]
CN 1287403A · 2001 [cited by applicant]
CN 101753075A · 2010 [cited by applicant]
CN 101894834A · 2010 [cited by applicant]
CN 103475210B · 2016 [cited by applicant]
CN 105553887A · 2016 [cited by applicant]
CN 106341048A · 2017 [cited by applicant]
CN 106385091A · 2017 [cited by applicant]
CN 206698127U · 2017 [cited by applicant]
CN 206698140U · 2017 [cited by examiner]
CN 207234465U · 2018 [cited by applicant]
CN 108880296A · 2018 [cited by applicant]
CN 110504250A · 2019 [cited by applicant]
CN 110799378A · 2020 [cited by applicant]
CN 211791278U · 2020 [cited by applicant]
CN 111934403A · 2020 [cited by applicant]
CN 112290646A · 2021 [cited by applicant]
CN 112366799A · 2021 [cited by applicant]
CN 108282089B · 2021 [cited by applicant]
CN 112636411A · 2021 [cited by applicant]
CN 112825312A · 2021 [cited by applicant]
CN 112913106A · 2021 [cited by applicant]
CN 110739739B · 2021 [cited by applicant]
CN 113315192A · 2021 [cited by applicant]
CN 113767651A · 2021 [cited by applicant]
CN 114336533A · 2022 [cited by applicant]
CN 114938043A · 2022 [cited by applicant]
CN 217545855U · 2022 [cited by applicant]
CN 115395606A · 2022 [cited by applicant]
CN 115498725A · 2022 [cited by applicant]
CN 218041230U · 2022 [cited by applicant]
CN 218124557U · 2022 [cited by applicant]
JP 2004289891A · 2004 [cited by applicant]
JP 5912513B2 · 2016 [cited by applicant]
JP 5986839B2 · 2016 [cited by applicant]
TW 200803142A · 2008 [cited by applicant]
TW 201603444A · 2016 [cited by applicant]
TW 201624892A · 2016 [cited by applicant]
TW 202040920A · 2020 [cited by applicant]
TW M624994U · 2022 [cited by applicant]
TW I763527B · 2022 [cited by applicant]
TW M629346U · 2022 [cited by applicant]
TW 202249381A · 2022 [cited by applicant]
TW M640153U · 2023 [cited by applicant]
WO 2018040170A1 · 2018 [cited by applicant]
WO 2022214083A1 · 2022 [cited by applicant]
Taiwan Intellectual Property Office, Office Action issued Jun. 6, 2023, in Application No. 111145067. [cited by applicant]
Taiwan Intellectual Property Office, Office Action issued Mar. 3, 2023, in Application No. 111135592. [cited by applicant]
Taiwan Intellectual Property Office, Office Action issued Nov. 3, 2023, in Application No. 112112686. [cited by applicant]
Taiwan Intellectual Property Office, Office Action issued Oct. 11, 2023, in Application No. 112112687. [cited by applicant]
Taiwan Intellectual Property Office, Office Action issued Oct. 11, 2023, in Application No. 112112688. [cited by applicant]
Taiwan Intellectual Property Office, Office Action issued Sep. 5, 2023, in Application No. 112106152. [cited by applicant]
Zhang, “A novel drive circuit of monolithic emitter-switching bipolar transistor (ESBT),” Manufacturing Automation, vol. 37, No. 11, pp. 86-89, Nov. 2015. [cited by applicant]
China Intellectual Property Office, Office Action issued Jun. 4, 2025, in Application No. 202210737276.2. [cited by applicant]
China Intellectual Property Office, Office Action issued Jun. 5, 2025, in Application No. 202210520590.5. [cited by applicant]
United States Patent and Trademark Office, Office Action issued Jul. 31, 2025, in U.S. Appl. No. 18/196,667. [cited by applicant]
China Intellectual Property Office, Office Action issued Dec. 1, 2025, in Application No. 202211630534.3. [cited by applicant]
China Intellectual Property Office, Office Action issued Dec. 1, 2025, in Application No. 202310012608.5. [cited by applicant]
China Intellectual Property Office, Office Action issued Dec. 1, 2025, in Application No. 202310012633.3. [cited by applicant]
China Intellectual Property Office, Office Action issued Nov. 15, 2025, in Application No. 202310012688.4. [cited by applicant]
He et al., “Novel Current Testing Method Suitable for Switching Voltage Stabilizers,” Modern Electronic Technology, Issue 16, pp. 198-201, 2010. [cited by applicant]
United States Patent and Trademark Office, Notice of Allowance mailed Feb. 19, 2026, in U.S. Appl. No. 18/196,667. [cited by applicant]
United States Patent and Trademark Office, Notice of Allowance issued May 14, 2026, in U.S. Appl. No. 18/196,667. [cited by applicant]