Method and system for obtaining optimal number of DMA channels
The present disclosure provides methods and apparatuses for processing data. In some embodiments, the method includes operating a device by transmitting, to a host, first data using a plurality of direct memory access (DMA) channels regardless of an order of each DMA channel of the plurality of DMA channels. The method further includes obtaining an optimal number of the DMA channels based on a process capacity of a receiver buffer of the host. The method further includes transmitting, by the device to the host, second data based on the optimal number of the DMA channels.
1. A method, comprising:
operating a device by transmitting, from the device to a host, first data using a first changed number of direct memory access (DMA) channels from among a plurality of DMA channels regardless of an order of each DMA channel;
transmitting, from the device to the host, second data using a second number of DMA channels from among the plurality of DMA channels regardless of the order of each DMA channel;
comparing a first system performance of the transmitting of the first data and a second system performance of the transmitting of the second data;
obtaining an optimal number of the DMA channels based on the comparing of the first system performance and the second system performance; and
transmitting, from the device to the host, third data based on the optimal number of the DMA channels.
2. The method of claim 1 , wherein the obtaining of the optimal number of the DMA channels comprises:
obtaining, by the device, the optimal number of the DMA channels based on a comparison of a first size of the first data transmitted and a second size of the second data.
3. The method of claim 2 , wherein the obtaining of the optimal number of the DMA channels further comprises:
receiving, by the device from the host, a process capacity of a receiver buffer of the host; and
obtaining of the optimal number of the DMA channels based on the process capacity of the receiver buffer of the host.
4. The method of claim 1 , further comprising:
changing, by the device, a number of the plurality of DMA channels, to form the first changed number of the DMA channels;
operating the device based on the first changed number of the DMA channels; and
measuring the first system performance based on the first changed number of the DMA channels.
5. The method of claim 4 , further comprising:
changing, by the device, the number of the plurality of DMA channels, to form the second changed number of the DMA channels, the second changed number being different from the first changed number;
operating the device based on the second changed number of the DMA channels; and
measuring the second system performance regarding the second changed number of the DMA channels.
6. The method of claim 1 , wherein the first system performance comprises at least one of a read speed of read data and an accuracy of the read data.
7. The method of claim 4 , further comprising:
transmitting, by the device to the host, dummy data based on the first changed number of the DMA channels.
8. The method of claim 4 , further comprising:
receiving, by the device from the host, a dummy read command.
9. A method of processing data by a device, the method comprising:
processing, by the device, first data in a non-sequential manner by using N direct memory access (DMA) channels, wherein N is a positive integer greater than zero;
processing, by the device, second data in a non-sequential manner by using M direct memory access (DMA) channels, wherein M is a positive integer greater than zero, and wherein M is different than N;
determining an optimal number of the DMA channels that maximizes a data read speed with a host by comparing a first system performance of the processing of the first data and a second system performance of the processing of the second data, wherein the optimal number of the DMA channels is greater than zero and less than or equal to N and M; and
operating the device based on the optimal number of the DMA channels.
10. The method of claim 9 , wherein the determining of the optimal number of DMA channels comprises:
obtaining, by the device, the optimal number of the DMA channels based on at least one of a comparison of a first size of the first data and a second size of the second data, or a process capacity of a receiver buffer of the host.
11. The method of claim 10 , further comprising:
receiving, by the device from the host, the process capacity of the receiver buffer of the host.
12. The method of claim 9 , further comprising:
changing, by the device, a number of the DMA channels from one (1) to N; and
obtaining the read speed for each changed number of the DMA channels.
13. The method of claim 12 , further comprising:
transmitting, by the device, dummy data based on each changed number of the DMA channels.
14. The method of claim 10 , wherein the determining of the optimal number of the DMA channels comprises:
receiving, by the device from the host, a dummy read command.
15. A system, comprising:
a device configured to process data in a non-sequential manner based on an optimal number of direct memory access (DMA) channels; and
a host comprising a receiver buffer and configured to transmit a command to the device,
wherein the device is further configured to obtain the optimal number of the DMA channels by comparing system performance information obtained by performing negotiation with the host.
16. The system of claim 15 , wherein the host is further configured to:
calculate the optimal number of the DMA channels based on at least one of a comparison of a first size of first data transmitted by a first number of DMA channels and a second size of second data transmitted by a second number of DMA channels, or a process capacity of the receiver buffer.
17. The system of claim 15 , wherein:
the device comprises N DMA channels, wherein N is a positive integer greater than zero, and
the device is further configured to:
change a number of the DMA channels from 1 to N;
measure performances of the system for each changed number of the DMA channels; and
obtain the optimal number of the DMA channels based on the measured performances.
18. The system of claim 17 , wherein the measured performances of the system comprises at least one of a read speed of read data and an accuracy of the read data.
19. The system of claim 17 , wherein the device is further configured to:
transmit, to the host, dummy data based on the changed number of the DMA channels.
20. The system of claim 17 , wherein the host is further configured to: transmit, to the device, a dummy read command.