IP Library › Granted Patent US 12,641,826
Granted Patent B2
US 12,641,826 · App. 18/221,479 · Granted May 26, 2026

Semiconductor device

Inventors: Eui Bok Lee (Suwon-si, KR); Moon Kyun Song (Suwon-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H10D30/6729H01L23/481H10D30/43H10D30/6735H10D30/6757H10D62/121H10D62/151
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,641,826
App. No.
18/221,479
Granted
May 26, 2026
Kind
B2
Abstract

A semiconductor device includes a fin-shaped pattern, a field insulating film covering a sidewall of the fin-shaped pattern, a source/drain pattern disposed on an upper surface of the fin-shaped pattern, a source/drain etch stop film extending along an upper surface of the field insulating film and a sidewall of the source/drain pattern, a source/drain contact connected to the source/drain pattern, a buried conductive pattern penetrating through a substrate and connected to the source/drain contact, a portion of the buried conductive pattern being disposed within the field insulating film, and a rear wiring line connected to the buried conductive pattern. The field insulating film includes a first field filling film and a first field stop film. The first field stop film is disposed between the first field filling film and the substrate. The first field stop film includes a material having etch selectivity with respect to the first field filling film.

Claims (101)

1 . A semiconductor device comprising:

a substrate including a first surface and a second surface opposite to each other in a vertical direction that is perpendicular to the first surface;

a fin-shaped pattern provided at the first surface of the substrate and extending in a first horizontal direction that is parallel to the first surface;

a field insulating film disposed on the first surface of the substrate and covering a sidewall of the fin-shaped pattern;

a source/drain pattern disposed on an upper surface of the fin-shaped pattern;

a source/drain etch stop film extending along an upper surface of the field insulating film and a sidewall of the source/drain pattern;

a source/drain contact disposed on the source/drain pattern and connected to the source/drain pattern;

a buried conductive pattern penetrating through the substrate and connected to the source/drain contact, a portion of the buried conductive pattern being disposed within the field insulating film; and

a rear wiring line disposed on the second surface of the substrate and connected to the buried conductive pattern,

wherein the field insulating film includes a first field filling film and a first field stop film,

wherein the upper surface of the field insulating film includes an upper surface of the first field filling film,

wherein the first field stop film is disposed between the first field filling film and the substrate,

wherein the first field stop film includes a material having etch selectivity with respect to the first field filling film,

wherein the first field filling film includes silicon oxide,

wherein the first field stop film includes an insulating material containing carbon,

wherein a concentration of the carbon in the first field stop film at a first height from the first surface of the substrate is different from a concentration of the carbon in the first field stop film at a second height from the first surface of the substrate, and

wherein the first height is different from the second height.

2 . The semiconductor device of claim 1 , further comprising:

a contact connection via disposed between the source/drain contact and the buried conductive pattern,

wherein the contact connection via penetrates through the source/drain etch stop film and is connected to the buried conductive pattern.

3 . The semiconductor device of claim 1 ,

wherein the buried conductive pattern includes a bottom surface connected to the rear wiring line and an upper surface opposite to the bottom surface of the buried conductive pattern in the vertical direction, and

wherein a height from the second surface of the substrate to the upper surface of the buried conductive pattern is smaller than or equal to a height from the second surface of the substrate to a bottom surface of the source/drain pattern.

4 . The semiconductor device of claim 1 ,

wherein the field insulating film further includes a second field filling film disposed between the first field stop film and the substrate, and

wherein the first field stop film includes a material having etch selectivity with respect to the second field filling film.

5 . The semiconductor device of claim 4 ,

wherein the field insulating film further includes a second field stop film disposed between the second field filling film and the substrate, and

wherein the second field stop film includes a material having etch selectivity with respect to the second field filling film.

6 . The semiconductor device of claim 5

wherein the field insulating film further includes a third field filling film disposed between the second field stop film and the substrate, and

wherein the second field stop film includes a material having etch selectivity with respect to the third field filling film.

7 . The semiconductor device of claim 1 ,

wherein the first field stop film includes a lower field stop film and an upper field stop film extending along the first surface of the substrate, and

wherein the upper field stop film contacts the lower field stop film.

8 . The semiconductor device of claim 1 ,

wherein a width of the buried conductive pattern in a second horizontal direction decreases as a distance from the second surface of the substrate increases, and

wherein the second horizontal direction is parallel to the first surface of the substrate and different from the first horizontal direction.

9 . The semiconductor device of claim 1 ,

wherein the substrate includes a semiconductor material.

10 . The semiconductor device of claim 1 ,

wherein the substrate is made of an insulating material.

11 . The semiconductor device of claim 10 , further comprising:

a sheet active pattern disposed on the fin-shaped pattern,

wherein the source/drain pattern contacts the sheet active pattern.

12 . A semiconductor device comprising:

a substrate including a first surface and a second surface opposite to each other in a vertical direction that is perpendicular to the first surface;

a fin-shaped pattern provided at the first surface of the substrate and extending in a first horizontal direction that is parallel to the first surface;

a gate electrode disposed on the fin-shaped pattern and extending in a second horizontal direction that is parallel to the first surface and different from the first horizontal direction;

a field insulating film disposed on the substrate and covering a sidewall of the fin-shaped pattern;

a source/drain pattern disposed on the fin-shaped pattern;

a source/drain contact disposed on the source/drain pattern and connected to the source/drain pattern;

a buried conductive pattern penetrating through the substrate, a height of the buried conductive pattern in the vertical direction being greater than a thickness of the substrate;

a contact connection via disposed between the source/drain contact and the buried conductive pattern; and

a rear wiring line disposed on the second surface of the substrate and connected to the buried conductive pattern,

wherein the field insulating film includes a first field filling film and a first field stop film,

wherein an upper surface of the field insulating film includes an upper surface of the first field filling film,

wherein the first field stop film is disposed between the first field filling film and the substrate,

wherein the first field stop film includes a material having etch selectivity with respect to the first field filling film,

wherein the buried conductive pattern includes a bottom surface connected to the rear wiring line and an upper surface opposite to the bottom surface of the buried conductive pattern in the vertical direction,

wherein a width of the bottom surface of the buried conductive pattern in the second horizontal direction is greater than a width of the upper surface of the buried conductive pattern in the second horizontal direction,

wherein the second horizontal direction is parallel to the first surface of the substrate and different from the first horizontal direction,

wherein the first field filling film includes silicon oxide,

wherein the first field stop film includes an insulating material containing carbon,

wherein a concentration of the carbon in the first field stop film at a first height from the first surface of the substrate is different from a concentration of the carbon in the first field stop film at a second height from the first surface of the substrate, and

wherein the first height is different from the second height.

13 . The semiconductor device of claim 12 ,

wherein a height from the second surface of the substrate to the upper surface of the buried conductive pattern is smaller than a height from the second surface of the substrate to a bottom surface of the source/drain pattern.

14 . The semiconductor device of claim 12 , further comprising:

a source/drain etch stop film extending along the upper surface of the field insulating film and a sidewall of the source/drain pattern,

wherein the contact connection via penetrates through the source/drain etch stop film and contacts the buried conductive pattern.

15 . The semiconductor device of claim 12 ,

wherein the field insulating film further includes a second field filling film disposed between the first field stop film and the substrate, and

wherein the first field stop film includes a material having etch selectivity with respect to the second field filling film.

16 . The semiconductor device of claim 15 ,

wherein the field insulating film further includes a second field stop film disposed between the second field filling film and the substrate, and

wherein the second field stop film includes a material having etch selectivity with respect to the second field filling film.

17 . A semiconductor device comprising:

a substrate including a first surface and a second surface opposite to each other in a vertical direction that is perpendicular to the first surface;

a fin-shaped pattern provided at the first surface of the substrate and extending in a first horizontal direction that is parallel to the first surface;

a sheet pattern disposed on the fin-shaped pattern and spaced apart from the fin-shaped pattern in the vertical direction;

a gate electrode disposed on the fin-shaped pattern and extending in a second horizontal direction that is parallel to the first surface and different from the first horizontal direction;

a field insulating film disposed on the substrate surrounding the fin-shaped pattern;

a source/drain pattern disposed on the fin-shaped pattern and connected to the sheet pattern;

a source/drain etch stop film extending along an upper surface of the field insulating film and a sidewall of the source/drain pattern;

a source/drain contact disposed on the source/drain pattern and connected to the source/drain pattern;

a rear wiring line disposed on the second surface of the substrate;

a buried conductive pattern connected to the rear wiring line and penetrating through the substrate; and

a contact connection via connecting the source/drain contact to the buried conductive pattern,

wherein the field insulating film includes a first field filling film and a field stop film, wherein the upper surface of the field insulating film includes an upper surface of the first field filling film,

wherein the field stop film is disposed between the first field filling film and the substrate,

wherein the field stop film includes a material having etch selectivity with respect to the first field filling film,

wherein the buried conductive pattern includes a bottom surface connected to the rear wiring line and an upper surface opposite to the bottom surface of the buried conductive pattern in the vertical direction,

wherein the upper surface of the buried conductive pattern is higher than the first surface of the substrate and lower than a bottom surface of the source/drain pattern relative to the second surface of the substrate,

wherein the first field filling film includes silicon oxide,

wherein the field stop film includes an insulating material containing carbon,

wherein a concentration of the carbon in the field stop film at a first height from the first surface of the substrate is different from a concentration of the carbon in the field stop film at a second height from the first surface of the substrate, and

wherein the first height is different from the second height.

18 . The semiconductor device of claim 17 ,

wherein the field insulating film further includes a second field filling film disposed between the field stop film and the substrate, and

wherein the field stop film includes a material having etch selectivity with respect to the second field filling film.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 31, 2023
From: LEE, EUI BOK; SONG, MOON KYUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 064434/0849 →
Priority Claims (1)
KR 10-2022-0186956 · Dec 28, 2022 · national
Continuity (1)
Related Publication 20240222450A1 · Jul 4, 2024
References Cited (15)
US 10586765B2 · Smith et al. · 2020 [cited by applicant]
US 10685865B2 · Sung et al. · 2020 [cited by applicant]
US 10770479B2 · Smith et al. · 2020 [cited by applicant]
US 10872859B2 · Kim et al. · 2020 [cited by applicant]
US 20210202325A1 · Lee · 2021 [cited by examiner]
US 20210375861A1 · Chung · 2021 [cited by examiner]
US 20220028895A1 · Kim et al. · 2022 [cited by applicant]
US 20220059460A1 · Do et al. · 2022 [cited by applicant]
US 20220077062A1 · Dal et al. · 2022 [cited by applicant]
US 20220122970A1 · Do et al. · 2022 [cited by applicant]
US 20220208679A1 · Lee et al. · 2022 [cited by applicant]
US 20220208757A1 · Do et al. · 2022 [cited by applicant]
US 20230317596A1 · Kim · 2023 [cited by examiner]
KR 1020220130352A · 2022 [cited by applicant]
KR 1020220162334A · 2022 [cited by applicant]