IP Library › Granted Patent US 12,660,087
Granted Patent B2
US 12,660,087 · App. 18/221,770 · Granted Jun 16, 2026

Multi-level baseboard management control structure

Inventors: Itay Kuperstein (Haifa, IL); Doron Fael (Zichron Yaakov, IL); Yevgeny Yanovsky (Kiryat Yam, IL)
Assignee: MELLANOX TECHNOLOGIES, LTD.
H05K1/144
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Quick Facts
Patent No.
US 12,660,087
App. No.
18/221,770
Granted
Jun 16, 2026
Kind
B2
Abstract

A baseboard management controller structure includes a microcontroller to provide baseboard management functions, levels of printed circuit board on which the microcontroller and peripheral circuits are mounted. The structure includes an interface to provide electrical communication between the microcontroller and a main board of a computing device.

Claims (38)

1 . A baseboard management controller (BMC) structure, comprising:

at least one microcontroller to provide baseboard management functions;

two or more printed circuit boards (PCBs) on which the at least one microcontroller and a plurality of peripheral circuits are mounted, wherein the plurality of peripheral circuits comprise one or more of an external root of trust, a voltage regulator, a random-access memory device, a non-volatile memory device, and one or more passive components; and

an interface to provide electrical communication to and from the BMC structure, wherein:

one or more of the plurality of peripheral circuits are on a top side of a first PCB of the two or more PCBs,

one or more of the plurality of peripheral circuits are on a bottom side of a second PCB of the two or more PCBs, and

the at least one microcontroller is mounted on a top side of the second PCB.

2 . The BMC structure of claim 1 , wherein the BMC structure provides out-of-band management capabilities to an external device via the interface.

3 . The BMC structure of claim 1 , wherein the two or more PCBs comprise at least three PCBs, wherein one or more voltage regulators are on the top side of the first PCB, one or more memory circuits are on a top side of a second third PCB of the two or more PCBs, and one or more of the passive components are on a bottom side of the third PCB.

4 . The BMC structure of claim 1 , wherein the two or more PCBs comprise at least four PCBs, wherein one of the four PCBs comprises a switch.

5 . The BMC structure of claim 1 , wherein the at least one microcontroller comprises a baseboard management controller.

6 . The BMC structure of claim 1 , wherein a footprint of a bottom PCB of the two or more PCBs is smaller than a total area of the two or more PCBs.

7 . The BMC structure of claim 1 , wherein a footprint of a bottom PCB of the two or more PCBs is less than one fourth of a total area of the two or more PCBs.

8 . The BMC structure of claim 1 , wherein the two or more PCBs are connected by adapters connected to soldered points on each of the two or more PCBs.

9 . The BMC structure of claim 1 , further comprising electrical links between each of the two or more PCBs providing structural support to one or more of the two or more PCBs.

10 . The BMC structure of claim 1 , wherein a top PCB of the two or more PCBs encompasses a larger area as compared to another PCB of the two or more PCBs.

11 . The BMC structure of claim 1 , wherein each of the two or more PCBs are separable.

12 . The BMC structure of claim 1 , further comprising a plurality of connectors, the connectors comprising one or more of Peripheral Component Interconnect Express (PCIe), universal serial bus (USB), Inter-Integrated Circuit (I2C), I3C, and general-purpose input/output (GPIO), and wherein the BMC structure provides the baseboard management functions for a server.

13 . The BMC structure of claim 1 , wherein the interface comprises one of a soldered connection to a motherboard or a detachable connector.

14 . The BMC structure of claim 1 , wherein the two or more PCBs are stacked vertically.

15 . A baseboard management controller circuit, comprising:

at least one microcontroller to provide baseboard management functions;

two or more printed circuit boards (PCBs) on which the at least one microcontroller and a plurality of peripheral circuits are mounted, wherein the plurality of peripheral circuits comprise one or more of an external root of trust, a voltage regulator, a random-access memory device, a non-volatile memory device, and one or more passive components; and

an interface providing electrical communication to and from the baseboard management controller circuit, wherein:

one or more of the peripheral circuits are on a top side of a first PCB of the two or more PCBs,

one or more of the peripheral circuits are on a bottom side of a second PCB of the two or more PCBs, and

the at least one microcontroller is mounted on a top side of the second PCB.

16 . A processing circuit, comprising:

at least one microcontroller to provide baseboard management functions;

a flexible printed circuit board (PCB), wherein the flexible PCB forms two or more levels, wherein the at least one microcontroller and a plurality of peripheral circuits are mounted on one or more of the two or more levels, wherein the plurality of peripheral circuits comprise one or more of an external root of trust, a voltage regulator, a random-access memory device, a non-volatile memory device, and one or more passive components; and

an interface to provide electrical communication to and from the processing circuit, wherein:

one or more of the peripheral circuits are on a top side of a first level of the two or more levels,

one or more of the peripheral circuits are on a bottom side of a second level of the two or more levels, and

the at least one microcontroller is mounted on a top side of the second level.

17 . The processing circuit of claim 16 , wherein each of the two or more levels is connected to another level by a screw.

18 . The processing circuit of claim 16 , wherein a bottom level comprises a ball grid array (BGA).

19 . The processing circuit of claim 18 , wherein the BGA is soldered to a motherboard.

20 . The processing circuit of claim 16 , wherein a top level of the two or more levels encompasses a larger area as compared to another level of the two or more levels.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2023
From: KUPERSTEIN, ITAY; FAEL, DORON; YANOVSKY, YEVGENY
To: MELLANOX TECHNOLOGIES, LTD.
Reel/Frame 064254/0450 →
Continuity (1)
Related Publication 20250021139A1 · Jan 16, 2025
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