IP Library Granted Patent US 12,293,992
Granted Patent B2
US 12,293,992 · App. 18/225,369 · Granted May 6, 2025

Semiconductor assemblies with systems and methods for managing high die stack structures

Inventors: Kelvin Tan Aik Boo (Singapore, SG); Seng Kim Ye (Singapore, SG); Chin Hui Chong (Singapore, SG); Hong Wan Ng (Singapore, SG)
Assignee: Micron Technology, Inc.
H01L25/0657H01L23/4985H01L24/48H01L25/50H01L2224/48147H01L2224/48227H01L2225/06506H01L2225/0651H01L2225/06562H01L2225/06572
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,293,992
App. No.
18/225,369
Granted
May 6, 2025
Kind
B2
Abstract

A semiconductor device includes a rigid flex circuit that has a first rigid region and a second rigid region that are electrically connected by a flexible portion. A first die is mounted to a first side of the first rigid region. A second die is mounted to a second side of the second rigid region. The first and second sides are on opposite sides of the rigid flex circuit. The flexible portion is bent to hold the first and second rigid regions in generally vertical alignment with each other.

Claims (37)

1. A semiconductor device, comprising:

a rigid flex circuit having a first rigid region and a second rigid region electrically connected by a flexible portion, wherein the first and second rigid regions include a soldermask material absent from the flexible portion;

a first die mounted to a first surface of the first rigid region; and

a second die mounted to a second surface of the second rigid region, the first and second surfaces being on a same side of the rigid flex circuit, wherein the flexible portion is bent to hold the first and second rigid regions in generally vertical alignment with each other.

2. The semiconductor device of claim 1 , wherein the first rigid region further comprises at least one bond pad on the first surface.

3. The semiconductor device of claim 1 , further comprising a first electrical connector electrically coupling the first die and the rigid flex circuit within the first rigid region.

4. The semiconductor device of claim 1 , further comprising:

a package substrate coupled to a third surface of the second rigid region opposite the second surface; and

a second electrical connector electrically coupling the package substrate and the rigid flex circuit within the second rigid region.

5. The semiconductor device of claim 1 , further comprising a third die mounted over at least a portion of an exposed side of the first die.

6. The semiconductor device of claim 5 , further comprising at least one electrical connector connecting the first die and the third die.

7. The semiconductor device of claim 1 , further comprising a third rigid region electrically coupled between the first and second rigid regions.

8. The semiconductor device of claim 7 , further comprising another flexible portion electrically coupled between the first and second rigid regions.

9. A semiconductor device, comprising:

a rigid flex circuit having a first rigid region and a second rigid region electrically connected by a flexible portion, wherein the first and second rigid regions include a soldermask material absent from the flexible portion, each of the first and second rigid regions having at least one bond pad thereon, wherein the flexible portion is configured to be flexed through about 180 degrees to hold the first and second rigid regions in generally vertical alignment with each other;

a first die mounted to a first surface of the first rigid region, the first die electrically connected to the at least one bond pad on the first rigid region;

a second die mounted to a second surface of the second rigid region, the second die electrically connected to the at least one bond pad on the second rigid region, wherein the first surface of the first rigid region and the second surface of the second rigid region are on a same side of the rigid flex circuit;

a package substrate connected to the rigid flex circuit when the rigid flex circuit is bent to bring the first die and the second die into generally vertical alignment; and

an electrical connector connecting the rigid flex circuit and the substrate.

10. The semiconductor device of claim 9 , wherein the rigid flex circuit further comprises a third rigid region and a second flexible portion, both electrically coupled between the first rigid region and the second rigid region, wherein the second flexible portion is flexed through about 180 degrees to hold the first, second, and third rigid regions generally in vertical alignment with each other.

11. The semiconductor device of claim 9 , wherein the rigid flex circuit includes an interconnect layer extending along at least a portion of a length of the rigid flex circuit, at least a portion of the interconnect layer electrically connected to at least one of the bond pads.

12. The semiconductor device of claim 9 , further comprising at least a third die mounted over at least a portion of the first die to form a die stack.

13. The semiconductor device of claim 9 , further comprising:

a third die stack mounted to the substrate, the third die stack comprising at least one die; and

at least one second electrical connector coupling at least some of the dies in the third die stack and the substrate, the third die stack positioned between the substrate and at least a portion of the rigid flex circuit.

14. The semiconductor device of claim 9 , further comprising:

a first plurality of dies mounted over the first die to form a first die stack, the first die and the first plurality of dies being electrically connected to each other; and

a second plurality of dies mounted over the second die to form a second die stack, the second die and the second plurality of dies being electrically connected to each other.

15. The semiconductor device of claim 9 , wherein the first and second dies are each one of a semiconductor die, a controller die, a molded controller die, or a memory die.

16. A method for forming a semiconductor device, comprising:

mounting a first die to a first surface of a first rigid region of a rigid flex circuit;

mounting a second die to a second surface of a second rigid region of the rigid flex circuit, the first surface and the second surface being on a same side of the rigid flex circuit; and

flexing a flexible portion through about 180 degrees to bring the first and second rigid regions into generally vertical alignment with each other, the flexible portion extending between and electrically connecting the first and second rigid regions,

wherein the first and second rigid regions include a soldermask material absent from the flexible portion.

17. The method of claim 16 , further comprising electrically connecting the first and second dies to the first and second rigid regions, respectively.

18. The method of claim 16 , further comprising mounting a plurality of dies over at least a portion of the first die to form a die stack.

19. The method of claim 18 , further comprising electrically connecting the plurality of dies and the first die together.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2023
From: BOO, KELVIN TAN AIK; YE, SENG KIM; CHONG, CHIN HUI; NG, HONG WAN
To: MICRON TECHNOLOGY, INC.
Reel/Frame 064358/0934 →
Continuity (2)
Continuation 17233129 · Apr 16, 2021
Related Publication 20230369291A1 · Nov 16, 2023
References Cited (4)
US 20050280138A1 · Shrivastava et al. · 2005 [cited by applicant]
US 20100181661A1 · Takemoto · 2010 [cited by examiner]
US 20190198411A1 · Horikawa · 2019 [cited by examiner]
US 20220336419A1 · Boo et al. · 2022 [cited by applicant]