IP Library Granted Patent US 12,602,102
Granted Patent B2
US 12,602,102 · App. 18/231,470 · Granted Apr 14, 2026

Selective backup to persistent memory for volatile memory

Inventor: Andrew Mills (Coto de Caza, CA)
Assignee: SMART Modular Technologies, Inc.
G06F1/305G06F1/3275G06F11/1448G06F12/02G06F13/4221G06F2213/0026
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Quick Facts
Patent No.
US 12,602,102
App. No.
18/231,470
Granted
Apr 14, 2026
Kind
B2
Abstract

Systems and methods for selective backup to persistent memory from volatile memory are disclosed. In one aspect, a memory controller includes a detection circuit that detects an address for a memory access and determines a range into which that address falls. The memory controller also includes a touched map that is configured to store an indication as to what areas (or ranges) of memory have been accessed, as determined by the detection circuit. In the event of a command or power interruption, a backup routine initially consults the touched map and only backs up those ranges which have been touched. Such selective backup may reduce the amount of time and power required to make a backup, reducing the demands placed on a backup energy source.

Claims (27)

1 . A memory device comprising:

a communication interface configured to couple to a bus and allow communication with a host controller therethrough, wherein the communication interface comprises a compute express link (CXL) interface and the communication is compliant with the CXL protocol;

a volatile random-access memory (RAM) portion;

a persistent memory portion;

a touch map circuit configured to store information related to addresses detected by a detection circuit; and

a backup memory controller configured to:

detect a backup event; and

copy data from the volatile RAM portion to the persistent memory portion based on the information in the touch map circuit;

receive a memory restore command from a host memory controller; and

responsive to receiving the memory restore command, determine when the portions of the volatile memory indicated in the touch map circuit exceed a threshold, and responsive to the threshold being exceeded, restore all the volatile memory portion.

2 . The memory device of claim 1 , further comprising a detection circuit configured to detect an address in a memory access command that accesses the volatile RAM portion.

3 . The memory device of claim 2 , wherein the backup memory controller configured to detect a backup event is configured to detect a power loss or interruption event.

4 . The memory device of claim 1 , further comprising a backup energy source configured to supply power to the volatile RAM portion during a power loss event.

5 . The memory device of claim 1 , wherein the memory device comprises a nonvolatile dual in-line memory module (NV-DIMM) stick.

6 . The memory device of claim 1 , wherein the information corresponds to a bit that represents a range of addresses in the volatile RAM portion.

7 . The memory device of claim 1 , wherein the touch map circuit is configured to store the information as a string of bits representing ranges of addresses that have been accessed.

8 . The memory device of claim 1 , wherein the communication interface comprises a detection circuit configured to detect an address in a memory access command that accesses the volatile RAM portion.

9 . A method of backing up memory, comprising:

storing an indication of a memory access in a touch map circuit corresponding to a volatile memory portion;

after a backup event trigger, backing up only portions of the volatile memory portion based on indications in the touch map circuit;

receiving a memory restore command from a host memory controller; and

responsive to receiving the memory restore command, determining when the portions of the volatile memory indicated in the touch map circuit exceed a threshold, and responsive to the threshold being exceeded, restoring all the volatile memory portion.

10 . The method of claim 9 , wherein receiving the memory access request comprises receiving the memory access request across a compute express link (CXL) bus and the memory access request is compliant with the CXL protocol.

11 . The method of claim 9 , further comprising detecting an address associated with the memory access.

12 . The method of claim 11 , wherein storing the indication, is based on the detecting.

13 . The method of claim 9 , wherein storing the indication comprises storing an indication that an address in a range of addresses has been accessed.

14 . The method of claim 9 , wherein, responsive to the memory restore command, restoring the portions of the volatile memory portion indicated in the touch map circuit.

Assignments (2)
PATENT SECURITY AGREEMENT Recorded Jun 30, 2025
From: CREELED, INC.; PENGUIN SOLUTIONS CORPORATION (DE); SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; SMART MODULAR TECHNOLOGIES, INC.; PENGUIN COMPUTING, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 071755/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2023
From: MILLS, ANDREW
To: SMART MODULAR TECHNOLOGIES, INC
Reel/Frame 064523/0792 →
Continuity (1)
Related Publication 20250053219A1 · Feb 13, 2025
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