Multiple contexts for a memory unit in a reconfigurable data processor
A system includes a coarse-grained reconfigurable (CGR) processor and a compiler configured to generate one or more configuration files for an application for execution on the CGR processor including an array of pattern compute units (PCUs) and pattern memory units (PMUs). A PCU is configured to perform an operation. A PMU comprises a plurality of data structures including a plurality of portions of operation-specific data related to the operation. The PMU is coupled to the PCU via a multi-segment datapath pipeline. The CGR processor is coupled to configure a segment of the datapath pipeline using a set of configurations bits corresponding to a portion of the operation-specific data related to the operation to activate to the segment, to further communicate the operation-specific data to the PCU via the activated segment. The CGR processor is coupled to switch among multiple PMU contexts in various segments sequentially to concurrently.
1 . A data processing system comprising coarse-grained reconfigurable (CGR) processor including a plurality of pattern compute units (PCUs) and a plurality of pattern memory units (PMUs) configured to execute a dataflow graph,
a PCU coupled a PMU via a multi-segment datapath pipeline,
the PCU coupled to perform a task including a plurality of operations,
the PMU coupled to receive a configuration file including PMU configuration data,
wherein the PMU configuration data includes multiple portions of operation-specific data corresponding to an operation to be held in a plurality of data structures in the PMU, and
multiple PMU contexts including a set of configuration bits to activate a segment of the multi-segment datapath pipeline,
wherein the segment of the multi-segment datapath pipeline includes a plurality of configurable fields corresponding to the operation,
wherein the PMU is coupled to configure a configurable field in the segment using a PMU context thereby activating the segment to form an activated segment corresponding to a portion of the operation-specific data,
wherein the PMU is coupled to communicate to the PCU, portion of the operation-specific data via the activated segment,
wherein the CGR processor is coupled to switch among multiple PMU contexts in the segment to communicate one or more portions of the operation-specific data related to a single operation, and
wherein switching among multiple PMU contexts in two or more segments concurrently to communicate one or more portions of operation-specific data related to multiple operations.
2 . The system of claim 1 wherein the operation can be a read or write operation.
3 . The system of claim 2 , wherein the configurable fields for the read operation are different from the configurable fields for the write operation.
4 . The system of claim 3 , wherein configurable fields for the read operation include a read address pointer field, a read scratchpad field, and a read output field.
5 . The system of claim 3 , wherein configurable fields for the write operation include a write address pointer field and a write scratchpad field.
6 . The system of claim 1 , wherein all the segments can have common configuration fields including can include an input field, a counters field, a headers field, input special function registers (SFRs) field, write crossbar field, read crossbar field, and output SFRs field.
7 . The system of claim 1 , wherein the configurable fields in the segment are retained if a current operation is same as a next operation.
8 . The system of claim 1 , wherein the configurable fields in the segment are changed if a next operation is different from a current operation.
9 . The system of claim 1 , wherein the multi-segment datapath pipeline includes three segments.
10 . A method for a coarse-grained reconfigurable (CGR) processor including an array of pattern compute units (PCUs) and pattern memory units (PMUs) configured to execute a dataflow graph, a PCU and a PMU coupled via a multi-segment datapath pipeline, the PMU comprising a plurality of data structures, the method comprising:
configuring the PCU to perform a task including a plurality of operations,
receiving a configuration file including multiple portions of operation-specific data corresponding to an operation to be held in a plurality of data structures in the PMU, configuring by the PMU, a configurable field in a segment of the multi-segment datapath pipeline, using a PMU context including a set of configuration bits,
thereby activating the segment to form an activated segment corresponding to a portion of the operation-specific data, and
communicating by the PMU to the PCU, the portion of the operation-specific data via the activated segment,
switching among multiple PMU contexts in the segment sequentially to communicate one or more portions of the operation-specific data related to a single operation, and
switching among multiple PMU contexts in two or more segments concurrently to communicate one or more portions of operation-specific data related to multiple operations.
11 . The method of claim 10 further wherein the operation can be a read or a write operation.
12 . The method of claim 11 , wherein the configurable fields for the read operation are different from the configurable fields for the write operation.
13 . The method of claim 12 , wherein configurable fields for the read operation include a read address pointer field, a read scratchpad field, and a read output field.
14 . The method of claim 12 , wherein configurable fields for the write operation include a write address pointer field and a write scratchpad field.
15 . The method of claim 10 , wherein all the segments can have common configuration fields including can include an input field, a counters field, a headers field, input special function registers (SFRs) field, write crossbar field, read crossbar field, and output SFRs field.
16 . The method of claim 10 , retaining the PMU context in the segment if a next operation-specific data is same as a current operation-specific data.
17 . The method of claim 10 , further comprising switching the PMU context in the segment if a next operation-specific data is different from a current operation-specific data.
18 . The method of claim 11 , wherein the multi-segment datapath pipeline includes three segments including one segment for the write operation and two segments for read operations.
19 . A non-transitory computer readable medium having instructions encoded thereon datapath configuring solutions for reconfigurable dataflow computing systems comprising a coarse-grained reconfigurable (CGR) processor including an array of CGR unit reconfigurable units including a plurality of pattern compute units (PCUs) and a plurality of pattern memory units (PMUs) configured to execute a dataflow graph, a PMU coupled to a PCU via a multi-segment datapath pipeline, the instructions configured to cause a processor to conduct a method comprising:
configuring the PCU to perform a task including a plurality of operations,
receiving a configuration file including multiple portions of operation-specific data corresponding to an operation to be held in a plurality of data structures in the PMU, configuring by the PMU, a configurable field in a segment of the multi-segment datapath pipeline, using a PMU context including a set of configuration bits,
thereby activating the segment to form an activated segment corresponding to a portion of the operation-specific data, and
communicating by the PMU to the PCU, the portion of the operation-specific data via the activated segment,
switching among multiple PMU contexts in the segment sequentially to communicate one or more portions of the operation-specific data related to a single operation, and
switching among multiple PMU contexts in two or more segments concurrently to communicate one or more portions of operation-specific data related to multiple operations.
20 . The method of claim 19 further wherein the operation can be a read or a write operation and wherein the configurable fields for the read operation are different from the configurable fields for the write operation.