Aligned metallization for solar cells
Aligned metallization approaches for fabricating solar cells, and the resulting solar cells, are described. In an example, a solar cell includes a semiconductor layer over a semiconductor substrate. A first plurality of discrete openings is in the semiconductor layer and exposes corresponding discrete portions of the semiconductor substrate. A plurality of doped regions is in the semiconductor substrate and corresponds to the first plurality of discrete openings. An insulating layer is over the semiconductor layer and is in the first plurality of discrete openings. A second plurality of discrete openings is in the insulating layer and exposes corresponding portions of the plurality of doped regions. Each one of the second plurality of discrete openings is entirely within a perimeter of a corresponding one of the first plurality of discrete openings. A plurality of conductive contacts is in the second plurality of discrete openings and is on the plurality of doped regions.
1. A method of fabricating a solar cell, the method comprising:
forming a first plurality of discrete openings in a semiconductor layer above a semiconductor substrate, the first plurality of discrete openings exposing corresponding discrete portions of the semiconductor substrate, wherein all adjacent openings of the first plurality of discrete openings have an overlap;
forming an insulating layer in the first plurality of discrete openings; and
forming a second plurality of discrete openings in the insulating layer using a laser ablation process, each one of the second plurality of discrete openings entirely within a perimeter of a corresponding one of the first plurality of discrete openings and entirely outside of a perimeter of both of the adjacent openings of the first plurality of discrete openings that overlap with the corresponding one of the first plurality of discrete openings.
2. The method of claim 1 , wherein forming the first plurality of discrete openings comprises using a laser ablation process.
3. The method of claim 1 , wherein forming the first plurality of discrete openings comprises using a screen print etch process.
4. The method of claim 1 , wherein forming the second plurality of discrete openings comprises forming one or more of the second plurality of discrete openings centered within a perimeter of a corresponding one or more of the first plurality of discrete openings.
5. A method of fabricating a solar cell, the method comprising:
forming a semiconductor layer over a semiconductor substrate;
forming an insulating layer over the semiconductor layer;
forming a first plurality of discrete openings in the insulating layer and in the semiconductor layer, the first plurality of discrete openings exposing corresponding discrete portions of the semiconductor substrate, wherein all adjacent openings of the first plurality of discrete openings have an overlap;
forming a doping source layer over the insulating layer and in the first plurality of discrete openings;
forming a plurality of doped regions in the semiconductor substrate corresponding to the first plurality of discrete openings, the plurality of doped regions formed from the doping source layer;
forming a second plurality of discrete openings in the doping source layer using a laser ablation process, each one of the second plurality of discrete openings entirely within a perimeter of a corresponding one of the first plurality of discrete openings and entirely outside of a perimeter of both of the adjacent openings of the first plurality of discrete openings that overlap with the corresponding one of the first plurality of discrete openings; and
forming a plurality of conductive contacts in the second plurality of discrete openings and on the plurality of doped regions.
6. The method of claim 5 , wherein forming the first plurality of discrete openings comprises using a laser ablation process.
7. The method of claim 5 , wherein forming the first plurality of discrete openings comprises using a screen print etch process.
8. The method of claim 5 , further comprising:
forming a third plurality of discrete openings in the doping source layer and the insulating layer exposing corresponding discrete portions of the semiconductor layer; and
forming a second plurality of conductive contacts in the third plurality of discrete openings and on the corresponding discrete portions of the semiconductor layer.
9. The method of claim 5 , wherein forming the second plurality of discrete openings comprises forming one or more of the second plurality of discrete openings centered within a perimeter of a corresponding one or more of the first plurality of discrete openings.
10. The method of claim 5 , wherein forming the second plurality of discrete openings comprises forming one or more of the second plurality of discrete openings off-center within a perimeter of a corresponding one or more of the first plurality of discrete openings.