IP Library Granted Patent US 12,530,837
Granted Patent B2
US 12,530,837 · App. 18/241,976 · Granted Jan 20, 2026

Primitive processing in a graphics processing system

Inventor: Jonathan Redshaw (St. Albans, GB)
Assignee: Imagination Technologies Limited
G06T15/405G06T2200/28
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Quick Facts
Patent No.
US 12,530,837
App. No.
18/241,976
Granted
Jan 20, 2026
Kind
B2
Abstract

A graphics processing system has a rendering space which is divided into tiles. Primitives within the tiles are processed to perform hidden surface removal and to apply texturing to the primitives. The graphics processing system includes a plurality of depth buffers, thereby allowing a processing module to process primitives of one tile by accessing one of the depth buffers while primitive identifiers of another, partially processed tile are stored in another one of the depth buffers. This allows the graphics processing system to have “multiple tiles in flight”, which can increase the efficiency of the graphics processing system.

Claims (20)

1 . A tag control module configured to associate, for each region of a plurality of regions of a rendering space, a depth buffer of a plurality of depth buffers with a respective set of one or more tag buffers of a plurality of tag buffers for processing the region.

2 . The tag control module of claim 1 , wherein the tag control module is configured to dynamically associate, for each region of the plurality of regions of the rendering space, a depth buffer of a plurality of depth buffers with a respective set of one or more tag buffers of a plurality of tag buffers for processing the region.

3 . The tag control module of claim 1 , wherein the region of the plurality of regions of the rendering space is a particular region of the plurality of regions of the rendering space.

4 . The tag control module of claim 1 , wherein the region of the plurality of regions of the rendering space is a tile of a plurality of tiles of the rendering space.

5 . The tag control module of claim 1 , wherein the tag control module is configured for use in a graphics processing unit, the graphics processing unit being configured to use the rendering space.

6 . The tag control module of claim 1 , wherein the plurality of tag buffers is greater than the plurality of depth buffers.

7 . The tag control module of claim 1 , wherein said respective set of one or more tag buffers comprises a plurality of the tag buffers.

8 . The tag control module of claim 7 , wherein the plurality of tag buffers in said respective set of one or more tag buffers are configured to store overlapping layers of primitive identifiers for primitives of the region.

9 . The tag control module of claim 1 , further configured to associate the respective set of one or more of the tag buffers by controlling selection of a tag buffer for storage of a primitive identifier, wherein the selection of a tag buffer is made according to layering of the primitives identified by the primitive identifiers stored in the tag buffers.

10 . The tag control module of claim 7 , wherein each set of one or more of the tag buffers is configured to store primitive identifiers of primitives for a plurality of sample positions, wherein primitive identifiers stored at corresponding sample positions in the tag buffers of the set represent overlapping layers of primitives.

11 . The tag control module of claim 1 , configured to process multiple regions in flight at a given time.

12 . The tag control module of claim 11 , wherein the tag control module is configured to allow the processing of primitives to switch between primitives of different regions when some but not all of the primitives of a region have finished being processed.

13 . The tag control module unit of claim 11 , wherein each of the depth buffers is configured to be associated with a respective one of said multiple regions which are in flight at a given time.

14 . The tag control module of claim 1 , wherein there is a predetermined maximum number of tag buffers which can be included in one of the sets of one or more tag buffers.

15 . The tag control module of claim 9 , further configured to control flushing of primitive identifiers from the tag buffers, wherein the tag control module is configured to determine which of the tag buffers to flush based on a flushing strategy.

16 . The tag control module of claim 15 , further configured to: (i) determine that the tag buffer containing primitive identifiers of the furthest layer is to be flushed before another tag buffer is flushed, or (ii) determine that the fullest tag buffer is to be flushed before another tag buffer is flushed.

17 . The tag control module of claim 15 , further configured to control the flushing of primitive identifiers from the tag buffers such that either: (i) primitive identifiers from only one tag buffer are flushed at a time, or (ii) primitive identifiers from multiple tag buffers are flushed simultaneously.

18 . A method of processing primitives in a graphics processing system having a rendering space which is sub-divided into regions, the method comprising associating, for each region, a depth buffer of a plurality of depth buffers with a respective set of one or more tag buffers of a plurality of tag buffers for processing the region.

19 . The method of claim 18 , wherein associating, for each region, a depth buffer of the plurality of depth buffers with a respective set of one or more of the plurality of tag buffers comprises selecting a tag buffer for storage of a primitive identifier, wherein the selection of a tag buffer is made according to layering of the primitives identified by the primitive identifiers stored in the tag buffers.

20 . A non-transitory computer readable storage medium having stored thereon computer readable code that when processed configures a system to generate a tag control module configured to associate, for each region of a plurality of regions of a rendering space, a depth buffer of a plurality of depth buffers with a respective set of one or more tag buffers of a plurality of tag buffers for processing the region.

Assignments (1)
SECURITY INTEREST Recorded Jul 31, 2024
From: IMAGINATION TECHNOLOGIES LIMITED
To: FORTRESS INVESTMENT GROUP (UK) LTD
Reel/Frame 068221/0001 →
Priority Claims (1)
GB 1322041 · Dec 13, 2013 · national
Continuity (7)
Continuation 17991941 · Nov 22, 2022
Continuation 17492038 · Oct 1, 2021
Continuation 17096295 · Nov 12, 2020
Continuation 16702383 · Dec 3, 2019
Continuation 15672455 · Aug 9, 2017
Continuation 14566931 · Dec 11, 2014
Related Publication 20230419598A1 · Dec 28, 2023
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