IP Library › Granted Patent US 12,282,794
Granted Patent B2
US 12,282,794 · App. 18/251,564 · Granted Apr 22, 2025

Data processing systems

Inventors: David Thomas Garbett (Cambridge, GB); Jussi Tuomas Pennala (Oulu, FI); Henrik Nils-Sture Olsson (Lund, SE); Nicholas John Nelson Murphy (Cambridge, GB)
Assignee: Arm Limited
G06F9/45558G06F11/0721G06F11/0751G06F2009/4557
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Quick Facts
Patent No.
US 12,282,794
App. No.
18/251,564
Filed
May 3, 2023
Granted
Apr 22, 2025
Kind
B2
Art Unit
2113
USPC
714/37
Abstract

A data processing system ( 1 ) comprises a plurality of processing units ( 11 ) and a controller ( 30 ) operable to allocate processing units of the plurality of processing units into respective groups of the processing units, wherein each group of processing units comprises a set of one or more of the processing units of the plurality of processing units. The data processing system further comprises an arbiter ( 31, 32 ) for each group of processing units for controlling access by virtual machines ( 33, 34 ) that require processing operations to the processing units of the group of processing units that the arbiter has been allocated.

Claims (64)

1. A data processing system comprising:

a plurality of processing units;

a controller operable to allocate processing units of the plurality of processing units into respective groups of the processing units, wherein each group of processing units comprises a set of one or more of the processing units of the plurality of processing units;

the data processing system further comprising:

one or more processors that execute a plurality of arbiters, each arbiter being operable to control access by virtual machines that require processing operations to the processing units of a group of processing units that the arbiter has been allocated;

wherein

the arbiter for a group of the processing units is only able to allow a virtual machine to access processing units from within the group of processing units that it has been allocated.

2. The system of claim 1 , wherein the controller executes on one processor of the system, and the arbiters and the virtual machines execute on a different processor or processors to the controller.

3. The system of claim 1 , further comprising:

a management circuit associated with the processing units and that is operable to configure the processing units into different groups under the control of the controller; wherein

the controller is configured to communicate with the management circuit over a communications bus that is not accessible to any of the virtual machines that may require processing by the processing units, nor to the arbiters for the groups of processing units.

4. The system of claim 1 , wherein

the processing units of a group of processing units are themselves able to be configured as respective partitions of processing units within the group, with each partition being able to be independently allocated to a virtual machine, and comprising a subset of one or more of the processing units of the group; and

the controller is operable to set for a group of processing units that it allocates, how many partitions of processing units the group supports;

wherein the arbiter for a group of processing units is operable to configure the processing units of the group into the set number of partitions of processing units for the group.

5. The system of claim 1 , wherein the controller is also operable to allocate to a group of processing units, one or more access windows that provide the mechanism by which virtual machines can access processing units of the group.

6. The system of claim 1 , wherein

the processing units of a group of processing units are themselves able to be configured as respective partitions of processing units within the group, with each partition being able to be independently allocated to a virtual machine, and comprising a subset of one or more of the processing units of the group; and

the arbiter for a group of processing units is operable to control access by virtual machines that require processing operations to the processing units of its group of processing units by enabling an access window that provides the mechanism by which a virtual machine can access processing units of the group associated with a virtual machine for access to a partition of the processing units of the group.

7. The system of claim 1 , comprising:

a first processor cluster that is configured to operate in a safety critical manner and that executes a safety-critical arbiter and a group of one or more safety critical virtual machines, and that communicates with the processing units via a first communications bus; and

a second processor cluster that is other than configured to operate in a safety-critical manner, and that executes a non-safety-critical arbiter and a group of one or more non-safety-critical virtual machines, and that communicates with the processing units via a second, different communications bus.

8. The system of claim 1 , further comprising:

a management circuit associated with the processing units and operable to configure the processing units of the plurality of processing units into respective groups of the processing units under the control of the controller;

and wherein:

the management circuit is configured to operate with a higher level of fault protection at all times; and

the groups of the processing units can be selectively operated with either of at least two modes of fault protection, where one mode provides a higher level of fault protection than the other mode.

9. The system of claim 8 , further comprising a fault detection testing mechanism that may be selectively performed for a group of processing units, whereby the groups of the processing units can be selectively operated with either a higher level of fault protection or a lower level of fault protection.

10. The system of claim 9 , wherein the fault detection testing for a group of processing units is performed under the control of an arbiter for the group of processing units.

11. The system of claim 10 , wherein respective arbiters of the system are configured either to perform or to not perform fault detection testing for a group of processing units that they have been allocated.

12. A method of operating a data processing system, the data processing system comprising a plurality of processing units, and one or more processors;

the method comprising:

a controller allocating processing units of the plurality of processing units into respective groups of the processing units, wherein each group of processing units comprises a set of one or more of the processing units of the plurality of processing units;

and, for each group of processing units:

an arbiter associated with that group of processing units, the arbiter executing on one of the processors, controlling access by a virtual machine or machines that requires processing operations to processing units from and solely from the group of processing units.

13. The method of claim 12 , wherein the system comprises a management circuit associated with the processing units and that is operable to configure the processing units into different groups under the control of the controller; and

the controller communicates with the management circuit over a communications bus that is not accessible to any of the virtual machines that may require processing by the processing units, nor to the arbiters for the groups of processing units.

14. The method of claim 12 , wherein

the processing units of a group of processing units are themselves able to be configured as respective partitions of processing units within the group, with each partition being able to be independently allocated to a virtual machine, and comprising a subset of one or more of the processing units of the group; and

the method comprises:

the controller setting for a group of processing units that it allocates, how many partitions of processing units the group supports; and

the arbiter for a group of processing units configuring the processing units of the group into the set number of partitions of processing units for the group.

15. The method of claim 12 , comprising the controller allocating to each group of processing units, one or more access windows that provide the mechanism by which virtual machines can access processing units of the group.

16. The method of claim 12 , wherein

the processing units of a group of processing units are themselves able to be configured as respective partitions of processing units within the group, with each partition being able to be independently allocated to a virtual machine, and comprising a subset of one or more of the processing units of the group; and

the method comprises:

the arbiter for a group of processing units controlling access by a virtual machine to the processing units of its group of processing units by enabling an access window that provides the mechanism by which a virtual machine can access processing units of the group associated with the virtual machine for access to a partition of the processing units of the group.

17. The method of claim 12 , wherein the data processing system comprises:

a first processor cluster that is configured to operate in a safety critical manner and that executes a safety-critical arbiter and a group of one or more safety critical virtual machines, and that communicates with the processing units via a first communications bus; and

a second processor cluster that is other than configured to operate in a safety-critical manner, and that executes a non-safety-critical arbiter and a group of one or more non-safety-critical virtual machines, and that communicates with the processing units via a second, different communications bus; and

the method comprises:

the controller allocating the plural processing units into two different groups of the processing units; and

assigning one group to the first communications bus and one group to the second communications bus.

18. The method of claim 12 , wherein the system comprises a management circuit associated with the processing units and operable to configure the processing units of the plurality of processing units into respective groups of the processing units under the control of the controller;

and the method comprises:

operating the management circuit with a higher level of fault protection at all times, but selectively operating the groups of the processing units with either of at least two modes of fault protection, where one mode provides a higher level of fault protection than the other mode.

19. The method of claim 18 , wherein:

the system comprises a plurality of arbiters, and respective arbiters of the system are configured either to perform or to not perform fault detection testing for a group of processing units that they have been allocated;

and the controller configures a group of processing units to be operated at a higher level of fault protection by assigning it to an arbiter that performs the fault detection testing, and configures a group of processing units to be operated with a lower level of fault protection by assigning it to an arbiter that does not perform the fault detection testing.

20. A non-transitory computer readable storage medium storing computer software code which when executing on one or more processors performs a method of operating a data processing system, the data processing system comprising a plurality of processing units, and one or more processors;

the method comprising:

a controller allocating processing units of the plurality of processing units into respective groups of the processing units, wherein each group of processing units comprises a set of one or more of the processing units of the plurality of processing units;

and, for each group of processing units:

an arbiter associated with that group of processing units, the arbiter executing on one of the processors, controlling access by a virtual machine or machines that requires processing operations to processing units from and solely from the group of processing units.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 30, 2023
From: GARBETT, DAVID THOMAS; PENNALA, JUSSI TUOMAS; OLSSON, HENRIK NILS-STURE; MURPHY, NICHOLAS JOHN NELSON
To: ARM LIMITED
Reel/Frame 063792/0925 →
Priority Claims (1)
GB 2017467 · Nov 4, 2020 · national
Continuity (1)
Related Publication 20240012673A1 · Jan 11, 2024
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