IP Library › Granted Patent US 12,738,894
Granted Patent B2
US 12,738,894 · App. 18/252,361 · Granted Sep 15, 2026

Progressive envelope tracking with delay compensation

Inventors: Nadim Khlat (Cugnaux, FR); Mohammad Ahsanul Adeeb (High Point, NC)
Assignee: Qorvo US, Inc.
H03F1/0277H03F1/0227H03F3/195H03F3/245H03F2200/102H03F2200/129H03F2200/135H03F2200/267H03F2200/451H03F2203/21106H03F2203/21145
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Quick Facts
Patent No.
US 12,738,894
App. No.
18/252,361
Granted
Sep 15, 2026
Kind
B2
Abstract

A progressive envelope tracking (ET) with delay compensation includes an ET integrated circuit (IC) (ETIC) that is a progressive ETIC that switches between different driver amplifiers having different associated offset voltages based on a tracking signal (e.g., Vramp) from a baseband transceiver. To make sure that desired changes to the offset voltage occur contemporaneously with an input signal for the driver amplifiers, a delay may be added to the input signal for the driver amplifiers. By adding and controlling this delay to the input to the driver amplifiers, the changes to the offset voltage will track the changes to the input signal at the driver amplifiers and overall efficiency of the ETIC may be improved.

Claims (34)

1 . An envelope tracking (ET) integrated circuit (IC) (ETIC) comprising:

an input configured to receive a vramp signal from a baseband transceiver;

a first driver amplifier coupled to a first offset capacitor and a first variable feedback circuit;

a second driver amplifier coupled to a second offset capacitor, the first variable feedback circuit, and a second variable delay circuit; and

a controller circuit configured to:

switch between the first driver amplifier and the second driver amplifier; and

adjust a first delay for a first path that extends from a node to the second driver amplifier through the second variable delay circuit to match a second delay for a second path that extends from the node to the second driver amplifier through the controller circuit.

2 . The ETIC of claim 1 , wherein the first offset capacitor is coupled to an output node.

3 . The ETIC of claim 2 , wherein the second offset capacitor is coupled to the output node, and wherein the second offset capacitor is serially positioned between the second driver amplifier and the output node.

4 . The ETIC of claim 1 , further comprising a bandpass filter coupled to the input and the node.

5 . The ETIC of claim 1 , further comprising an anti-aliasing filter (AAF) coupled to the node and the first driver amplifier.

6 . The ETIC of claim 1 , wherein the second offset capacitor is smaller than the first offset capacitor.

7 . The ETIC of claim 1 , wherein the controller circuit is configured to adjust

the first delay by adjusting the second variable delay circuit to increase a delay.

8 . The ETIC of claim 5 , wherein the controller circuit is configured to adjust the first delay by adjusting the AAF to increase a delay.

9 . The ETIC of claim 1 , further comprising a switch that selectively couples the first driver amplifier to ground, wherein the controller circuit is configured to operate the switch to switch between the first driver amplifier and the second driver amplifier.

10 . The ETIC of claim 1 , further comprising a scaling circuit coupled to the node.

11 . A wireless device comprising:

a baseband transceiver configured to produce a vramp signal;

an envelope tracking (ET) integrated circuit (IC) (ETIC) coupled to the baseband transceiver, the ETIC comprising:

an input configured to receive the vramp signal;

a first driver amplifier coupled to a first offset capacitor and a first variable feedback circuit;

a second driver amplifier coupled to a second offset capacitor, the first variable feedback circuit, and a second variable delay circuit; and

a controller circuit configured to:

switch between the first driver amplifier and the second driver amplifier; and

adjust a first delay for a first path that extends from a node to the second driver amplifier through the second variable delay circuit to match a second delay for a second path that extends from the node to the second driver amplifier through the controller circuit.

12 . The wireless device of claim 11 , wherein the first offset capacitor is coupled to an output node.

13 . The wireless device of claim 12 , wherein the second offset capacitor is coupled to the output node.

14 . The wireless device of claim 13 , further comprising a power amplifier coupled to the output node.

15 . The wireless device of claim 11 , further comprising an anti-aliasing filter (AAF) coupled to the node and the first driver amplifier.

16 . The wireless device of claim 11 , wherein the controller circuit is configured

to adjust the first delay by adjusting the second variable delay circuit to increase a delay.

17 . The wireless device of claim 15 , wherein the controller circuit is configured to adjust the first delay by adjusting the AAF to increase a delay.

18 . The wireless device of claim 11 , further comprising a switch that selectively couples the first driver amplifier to ground, wherein the controller circuit is configured to operate the switch to switch between the first driver amplifier and the second driver amplifier.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 10, 2023
From: KHLAT, NADIM; ADEEB, MOHAMMAD AHSANUL
To: QORVO US, INC.
Reel/Frame 063590/0166 →
Continuity (2)
Provisional Application 63114200 · Nov 16, 2020
Related Publication 20240007054A1 · Jan 4, 2024
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