IP Library Granted Patent US 12,593,335
Granted Patent B2
US 12,593,335 · App. 18/255,278 · Granted Mar 31, 2026

Logical channels and scheduling request configurations for full-duplex modes and half-duplex modes

Inventors: Ahmed Attia Abotabl (San Diego, CA); Linhai He (San Diego, CA); Ruiming Zheng (Beijing, CN); Muhammad Sayed Khairy Abdelghaffar (San Jose, CA); Abdelrahman Mohamed Ahmed Mohamed Ibrahim (San Diego, CA); Wanshi Chen (San Diego, CA); Gavin Bernard Horn (La Jolla, CA); Krishna Kiran Mukkavilli (San Diego, CA); Hwan Joon Kwon (San Diego, CA)
Assignee: QUALCOMM Incorporated
H04W72/21H04L5/16H04W88/06
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Quick Facts
Patent No.
US 12,593,335
App. No.
18/255,278
Granted
Mar 31, 2026
Kind
B2
Abstract

Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive a configuration message indicating a scheduling request configuration that includes at least one resource associated with a half-duplex mode of the UE and at least one resource associated with a full-duplex mode of the UE. The UE may transmit a scheduling request using the at least one resource associated with the half-duplex mode or the at least one resource associated with the full-duplex mode. Additionally, or alternatively, the configuration message may indicate a logical channel that maps to a corresponding scheduling request configuration associated with a half-duplex mode of the UE, to a corresponding scheduling request configuration associated with a full-duplex mode of the UE, or to a combination thereof. Accordingly, the UE may transmit the scheduling request using the logical channel. Numerous other aspects are described.

Claims (50)

1 . A user equipment (UE) for wireless communication, comprising:

a memory; and

one or more processors coupled to the memory, the memory and the one or more processors configured to:

receive, from a base station, a configuration message indicating a scheduling request configuration that includes at least one resource associated with a half-duplex mode of the UE and at least one resource associated with a full-duplex mode of the UE; and

transmit, to the base station, a scheduling request using the at least one resource associated with the half-duplex mode or the at least one resource associated with the full-duplex mode.

2 . The UE of claim 1 , wherein the at least one resource associated with the half-duplex mode and the at least one resource associated with the full-duplex mode are included in at least one bandwidth part that is common to the half-duplex mode and the full-duplex mode.

3 . The UE of claim 1 , wherein the at least one resource associated with the half-duplex mode includes one or more first physical uplink control channel (PUCCH) resources, and the at least one resource associated with the full-duplex mode includes one or more second PUCCH resources that are separate from the one or more first PUCCH resources.

4 . The UE of claim 1 , wherein the scheduling request configuration includes one or more physical uplink control channel (PUCCH) resources that are common to the half-duplex mode and the full-duplex mode.

5 . The UE of claim 1 , wherein the scheduling request configuration further includes a first timer associated with the half-duplex mode and a second timer associated with the full-duplex mode.

6 . The UE of claim 5 , wherein the scheduling request is transmitted based at least in part on a determination that the first timer is not running or a determination that the second timer is not running.

7 . The UE of claim 5 , wherein the scheduling request configuration further includes a counter limit common to the half-duplex mode and the full-duplex mode.

8 . The UE of claim 7 , wherein the scheduling request is transmitted based at least in part on a determination that the counter limit is not satisfied.

9 . The UE of claim 7 , wherein the memory and the one or more processors are further configured to:

transmit, to the base station and after transmitting the scheduling request, a random access preamble, based at least in part on a determination that the counter limit is satisfied.

10 . The UE of claim 1 , wherein the scheduling request configuration further includes a first counter limit associated with the half-duplex mode and a second counter limit associated with the full-duplex mode.

11 . The UE of claim 10 , wherein the scheduling request is transmitted based at least in part on a determination that the first counter limit is not satisfied or a determination that the second counter limit is not satisfied.

12 . The UE of claim 10 , wherein the scheduling request configuration further includes a timer common to the half-duplex mode and the full-duplex mode.

13 . The UE of claim 12 , wherein the scheduling request is transmitted based at least in part on a determination that the timer is not running.

14 . The UE of claim 10 , wherein the memory and the one or more processors are further configured to:

transmit, to the base station and after transmitting the scheduling request, a random access preamble, based at least in part on a determination that the first counter limit is satisfied or a determination that the second counter limit is satisfied.

15 . A base station for wireless communication, comprising:

a memory; and

one or more processors coupled to the memory, the memory and the one or more processors configured to:

transmit, to a user equipment (UE), a configuration message indicating a scheduling request configuration that includes at least one resource associated with a half-duplex mode of the UE and at least one resource associated with a full-duplex mode of the UE; and

receive, from the UE, a scheduling request using the at least one resource associated with the half-duplex mode or the at least one resource associated with the full-duplex mode.

16 . The base station of claim 15 , wherein the at least one resource associated with the half-duplex mode includes one or more first physical uplink control channel (PUCCH) resources, and the at least one resource associated with the full-duplex mode includes one or more second PUCCH resources that are separate from the one or more first PUCCH resources.

17 . The base station of claim 15 , wherein the scheduling request configuration further includes a first timer associated with the half-duplex mode and a second timer associated with the full-duplex mode.

18 . The base station of claim 17 , wherein the scheduling request is received based at least in part on the first timer not running or the second timer not running.

19 . The base station of claim 17 , wherein the scheduling request configuration further includes a counter limit common to the half-duplex mode and the full-duplex mode.

20 . The base station of claim 19 , wherein the scheduling request is received based at least in part on the counter limit not being satisfied.

21 . The base station of claim 19 , wherein the memory and the one or more processors are further configured to:

receive, from the UE and after receiving the scheduling request, a random access preamble, based at least in part on the counter limit being satisfied.

22 . The base station of claim 17 , wherein the scheduling request configuration further includes a first counter limit associated with the half-duplex mode and a second counter limit associated with the full-duplex mode.

23 . The base station of claim 22 , wherein the scheduling request is received based at least in part on the first counter limit not being satisfied or the second counter limit not being satisfied.

24 . The base station of claim 22 , wherein the scheduling request configuration further includes a timer common to the half-duplex mode and the full-duplex mode.

25 . The base station of claim 24 , wherein the scheduling request is received based at least in part on the timer not running.

26 . The base station of claim 22 , wherein the memory and the one or more processors are further configured to:

receive, from the UE and after receiving the scheduling request, a random access preamble, based at least in part on the first counter limit being satisfied or the second counter limit being satisfied.

27 . A user equipment (UE) for wireless communication, comprising:

a memory; and

one or more processors coupled to the memory, the memory and the one or more processors configured to:

receive, from a base station, a configuration message indicating a logical channel configuration that maps a logical channel to a corresponding scheduling request configuration associated with a half-duplex mode of the UE, to a corresponding scheduling request configuration associated with a full-duplex mode of the UE, or to a combination thereof, and

transmit, to the base station, a scheduling request using the logical channel.

28 . The UE of claim 27 , wherein the logical channel configuration further includes an indicator excluding the logical channel from being used in the half-duplex mode or in the full-duplex mode.

29 . A base station for wireless communication, comprising:

a memory; and

one or more processors coupled to the memory, the memory and the one or more processors configured to:

transmit, to a user equipment (UE), a configuration message indicating a logical channel configuration that maps a logical channel to a corresponding scheduling request configuration associated with a half-duplex mode of the UE, to a corresponding scheduling request configuration associated with a full-duplex mode of the UE, or to a combination thereof, and

receive, from the UE, a scheduling request using the logical channel.

30 . The base station of claim 29 , wherein the logical channel configuration further includes an indicator excluding the logical channel from being used in the half-duplex mode or in the full-duplex mode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 1, 2023
From: ABOTABL, AHMED ATTIA; HE, LINHAI; ZHENG, RUIMING; ABDELGHAFFAR, MUHAMMAD SAYED KHAIRY; IBRAHIM, ABDELRAHMAN MOHAMED AHMED MOHAMED; CHEN, WANSHI; HORN, GAVIN BERNARD; MUKKAVILLI, KRISHNA KIRAN; KWON, HWAN JOON
To: QUALCOMM INCORPORATED
Reel/Frame 063833/0381 →
Continuity (1)
Related Publication 20240032042A1 · Jan 25, 2024
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