IP Library › Granted Patent US 12,660,660
Granted Patent B2
US 12,660,660 · App. 18/257,186 · Granted Jun 16, 2026

Semiconductor device

Inventor: Hiroki Miyazaki (Kyoto, JP)
Assignee: ROHM CO., LTD.
H10W70/657H10W70/65H10W70/685H10W74/476H10W74/40
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Quick Facts
Patent No.
US 12,660,660
App. No.
18/257,186
Granted
Jun 16, 2026
Kind
B2
Abstract

This semiconductor device comprises a substrate, a first wiring part, a second wiring part, and a semiconductor element. The first wiring part includes a first through-electrode, first main-surface wiring, and a first wiring electrode. The second wiring section includes a second through-electrode, second main-surface wiring, and a second wiring electrode. An upper surface is depressed toward the interior of the first through-electrode. The first wiring electrode is joined to a first element electrode of the semiconductor element by a first joining member. The second wiring electrode is joined to a second element electrode of the semiconductor element by a second joining member. The first wiring electrode, which is formed on an upper surface of the first main-surface wiring, is larger than the second wiring electrode, which is formed on an upper surface of the second main-surface wiring, as seen from the thickness direction.

Claims (60)

1 . A semiconductor device, comprising:

a substrate that includes a substrate main surface facing a thickness direction;

a semiconductor element that includes an element main surface facing the substrate main surface, a first element electrode formed on the element main surface, and a second element electrode formed on the element main surface;

a first through-electrode that extends through the substrate and includes a first electrode upper surface facing the same direction as the substrate main surface;

a second through-electrode that extends through the substrate and includes a second electrode upper surface facing the same direction as the substrate main surface;

a first main surface wiring line that contacts the substrate main surface and the first electrode upper surface and includes a first wiring line upper surface facing the same direction as the substrate main surface;

a second main surface wiring line that contacts the second electrode upper surface and includes a second wiring line upper surface facing the same direction as the substrate main surface;

a first wiring line electrode formed on the first wiring line upper surface;

a second wiring line electrode formed on the second wiring line upper surface;

a first joining member that joins the first element electrode and the first wiring line electrode; and

a second joining member that joins the second element electrode and the second wiring line electrode, wherein

the first electrode upper surface is recessed into the first through-electrode,

the second electrode upper surface is recessed into the second through-electrode, and

the first wiring line electrode is larger than the second wiring line electrode, as viewed in the thickness direction.

2 . The semiconductor device according to claim 1 , wherein the first element electrode and the second element electrode are equal in size, as viewed in the thickness direction.

3 . The semiconductor device according to claim 1 , wherein the second wiring line electrode and the second element electrode are equal in size, as viewed in the thickness direction.

4 . The semiconductor device according to claim 1 , wherein the second wiring line electrode is larger in size than the second element electrode, as viewed in the thickness direction.

5 . The semiconductor device according to claim 1 , wherein the first wiring line electrode and the first element electrode are equal in size, as viewed in the thickness direction.

6 . The semiconductor device according to claim 1 , wherein the first wiring line electrode is larger in size than the first element electrode, as viewed in the thickness direction.

7 . A semiconductor device, comprising:

a substrate that includes a substrate main surface facing a thickness direction;

a semiconductor element that includes an element main surface facing the substrate main surface, a first element electrode formed on the element main surface, and a second element electrode formed on the element main surface;

a first through-electrode that extends through the substrate and includes a first electrode upper surface facing the same direction as the substrate main surface;

a second through-electrode that extends through the substrate and includes a second electrode upper surface facing the same direction as the substrate main surface;

a first main surface wiring line that contacts the substrate main surface and the first electrode upper surface and includes a first wiring line upper surface facing the same direction as the substrate main surface;

a second main surface wiring line that contacts the second electrode upper surface and includes a second wiring line upper surface facing the same direction as the substrate main surface;

a first wiring line electrode formed on the first wiring line upper surface;

a second wiring line electrode formed on the second wiring line upper surface;

a first joining member that joins the first element electrode and the first wiring line electrode; and

a second joining member that joins the second element electrode and the second wiring line electrode, wherein

the first electrode upper surface is recessed into the first through-electrode,

the second electrode upper surface is recessed into the second through-electrode, and

the first element electrode is larger than the second element electrode, as viewed in the thickness direction.

8 . The semiconductor device according to claim 7 , wherein the first wiring line electrode is equal in size to the second wiring line electrode, as viewed in the thickness direction.

9 . The semiconductor device according to claim 7 , wherein the second wiring line electrode and the second element electrode are equal in size, as viewed in the thickness direction.

10 . The semiconductor device according to claim 7 , wherein the second wiring line electrode is larger in size than the second element electrode, as viewed in the thickness direction.

11 . The semiconductor device according to claim 7 , wherein the first wiring line electrode and the first element electrode are equal in size, as viewed in the thickness direction.

12 . The semiconductor device according to claim 7 , wherein the first wiring line electrode is larger in size than the first element electrode, as viewed in the thickness direction.

13 . The semiconductor device according to claim 1 , wherein the first wiring line electrode is formed on the first wiring line upper surface that overlaps the substrate main surface.

14 . The semiconductor device according to claim 1 , wherein the first main surface wiring line and the second main surface wiring line are equal in thickness.

15 . The semiconductor device according to claim 1 , wherein sets of the second-through electrode, the second main surface wiring line, and the second wiring line electrode are arranged in a region that overlaps the semiconductor element, as viewed in the thickness direction.

16 . The semiconductor device according to claim 1 , wherein the second main surface wiring line includes an extension located outward from the second through-electrode, as viewed in the thickness direction.

17 . The semiconductor device according to claim 1 , comprising an encapsulation resin that covers the substrate main surface and the semiconductor element.

18 . The semiconductor device according to claim 17 , wherein the encapsulation resin is applied between the substrate main surface and the semiconductor element.

19 . The semiconductor device according to claim 1 , wherein the substrate includes a substrate back surface at a side opposite the substrate main surface in the thickness direction, the semiconductor device comprising:

a first external conductive film that covers the first through-electrode exposed from the substrate back surface; and

a second external conductive film that covers the second through-electrode exposed from the substrate back surface.

20 . The semiconductor device according to claim 19 , wherein:

the substrate includes a substrate side surface that intersects the substrate main surface;

the first through-electrode includes an electrode side surface exposed from the substrate side surface; and

the first external conductive film covers the electrode side surface of the first through-electrode.

21 . The semiconductor device according to claim 20 , wherein:

the first main surface wiring line includes a wire side surface exposed from the substrate side surface; and

the first external conductive film covers the wire side surface of the first main surface wiring line.

22 . The semiconductor device according to claim 1 , wherein:

the semiconductor element includes an electrode pad; and

the first element electrode and the second element electrode are disposed at positions overlapping the electrode pad in the thickness direction.

23 . The semiconductor device according to claim 1 , wherein:

the semiconductor element includes an electrode pad and a rewiring layer connected to the electrode pad; and

the first element electrode and the second element electrode are connected to the rewiring layer and disposed at positions that do not overlap the electrode pad in the thickness direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 13, 2023
From: MIYAZAKI, HIROKI
To: ROHM CO., LTD.
Reel/Frame 063937/0300 →
Priority Claims (1)
JP 2020-208369 · Dec 16, 2020 · national
Continuity (1)
Related Publication 20240038640A1 · Feb 1, 2024
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