Processing method, apparatus, and system for brute force hot unplug operation on solid state disk, and medium

1 . A processing method for a brute force hot unplug operation on a U.2 Non-Volatile Memory Express (NVMe) solid-state disk, comprising:

predefining a short signal pin for detecting whether an NVMe solid-state disk is in place, and presetting to trigger an operation of calling a System Management Interrupt (SMI) program according to input state change information of a General-Purpose input/output (GPIO) of a Platform controller hub (PCH) chip, wherein the GPIO is connected to the short signal pin, and an input state value of the GPIO is determined according to a connection state of the short signal pin and a U.2 slot;

calling the SMI program in response to a change in an input state of the GPIO being detected, and reading the input state value of the GPIO; and

breaking a link between a Peripheral Component Interconnect Express (PCIe) root bridge and the NVMe solid-state disk by using the SMI program in response to the input state value of the GPIO being a corresponding value about the NVMe solid-state disk not in place;

wherein the step of breaking a link between a PCIe root bridge and the NVMe solid-state disk by using the SMI program comprises:

setting a link inhibit bit in a link controller by using the SMI program, wherein

the link inhibit bit is used to break the link between the PCIe root bridge and the NVMe solid-state disk, so as to discard input/output (IO) transaction data or return unsupported request responses in a communication direction from the PCIe root bridge to the NVMe solid-state disk, and to discard unfinished IO transaction data in a communication direction from the NVMe solid-state disk to the PCIe root bridge.

2 . The processing method for a brute force hot unplug operation on a U.2 NVMe solid-state disk according to claim 1 , wherein after the step of breaking a link between a PCIe root bridge and the NVMe solid-state disk by using the SMI program, the method further comprises:

checking an in-place state in a slot state register by using the SMI program; and

clearing the link inhibit bit of the link controller to recover an original state in response to the NVMe solid-state disk being not in place, and exiting the SMI program.

3 . The processing method for a brute force hot unplug operation on a U.2 NVMe solid-state disk according to claim 1 , wherein the NVMe solid-state disk has a long signal pin, and after reading the input state value of the GPIO, the method further comprises:

in response to the input state value of the GPIO being a corresponding value about the NVMe solid-state disk in place, skipping processing a plugged device by the SMI program, returning from the SMI program to recover a saved current state, and continuing to execute an INTx interrupt program, wherein

the INTx interrupt program is generated in response to an in-place state of an in-place signal corresponding to the long signal pin changing.

4 . The processing method for a brute force hot unplug operation on a U.2 NVMe solid-state disk according to claim 1 , wherein the short signal pin is a short pin among power input pins.

5 . The processing method for a brute force hot unplug operation on a U.2 NVMe solid-state disk according to claim 1 , wherein the step of presetting to trigger an operation of calling a SMI program according to input state change information of a GPIO of a PCH chip comprises:

storing, in a Central Processing Unit (CPU), a value of a register in a System Management RAM (SMRAM) before entering a System Management Mode (SMM), and jumping to an SMI ENTRY POINT for execution.

6 . The processing method for a brute force hot unplug operation on a U.2 NVMe solid-state disk according to claim 1 , wherein the SMI program is in a form of software interrupt.

7 . A processing apparatus for a brute force hot unplug operation on a U.2 Non-Volatile Memory Express (NVMe) solid-state disk, comprising a processor and a memory storing a computer program, wherein the processor is configured to execute the computer program, and upon execution of the computer program, is configured to:

predefine a short signal pin for detecting whether an NVMe solid-state disk is in place, and preset to trigger an operation of calling a System Management Interrupt (SMI) program according to input state change information of a General-Purpose input/output (GPIO) of a Platform controller hub (PCH) chip, wherein the GPIO is connected to the short signal pin, and an input state value of the GPIO is determined according to a connection state of the short signal pin and a U.2 slot;

call the SMI program in response to a change in an input state of the GPIO being detected, and read the input state value of the GPIO; and

break a link between a Peripheral Component Interconnect Express (PCIe) root bridge and the NVMe solid-state disk by using the SMI program in response to the input state value of the GPIO being a corresponding value about the NVMe solid-state disk not in place;

wherein the step of breaking a link between a PCIe root bridge and the NVMe solid-state disk by using the SMI program comprises:

setting a link inhibit bit in a link controller by using the SMI program, wherein

the link inhibit bit is used to break the link between the PCIe root bridge and the NVMe solid-state disk, so as to discard input/output (IO) transaction data or return unsupported request responses in a communication direction from the PCIe root bridge to the NVMe solid-state disk, and to discard unfinished IO transaction data in a communication direction from the NVMe solid-state disk to the PCIe root bridge.

8 . The processing apparatus for a brute force hot unplug operation on a U.2 NVMe solid-state disk according to claim 7 , wherein the processor, upon execution of the computer program, is further configured to:

check an in-place state in a slot state register by using the SMI program; and

clear the link inhibit bit of the link controller to recover an original state in response to the NVMe solid-state disk being not in place, and exit the SMI program.

9 . The processing apparatus for a brute force hot unplug operation on a U.2 NVMe solid-state disk according to claim 7 , wherein the NVMe solid-state disk has a long signal pin, and after reading the input state value of the GPIO, and the processor, upon execution of the computer program, is further configured to:

in response to the input state value of the GPIO being a corresponding value about the NVMe solid-state disk in place, skip processing a plugged device by the SMI program, return from the SMI program to recover a saved current state, and continue to execute an INTx interrupt program, wherein

the INTx interrupt program is generated in response to an in-place state of an in-place signal corresponding to the long signal pin changing.

10 . The processing apparatus for a brute force hot unplug operation on a U.2 NVMe solid-state disk according to claim 7 , wherein the short signal pin is a short pin among power input pins.

11 . The processing apparatus for a brute force hot unplug operation on a U.2 NVMe solid-state disk according to claim 7 , wherein the processor, upon execution of the computer program, is further configured to:

store, in a Central Processing Unit (CPU), a value of a register in a System Management RAM (SMRAM) before entering a System Management Mode (SMM), and jump to an SMI ENTRY POINT for execution.

12 . The processing apparatus for a brute force hot unplug operation on a U.2 NVMe solid-state disk according to claim 7 , wherein the SMI program is in a form of software interrupt.

13 . A non-transitory computer-readable storage medium, storing a processing program for a brute force hot unplug operation on a U.2 Non-Volatile Memory Express (NVMe) solid-state disk, wherein the processing program, when executed by a processor, is configured to cause the processor to:

predefine a short signal pin for detecting whether an NVMe solid-state disk is in place, and preset to trigger an operation of calling a System Management Interrupt (SMI) program according to input state change information of a General-Purpose input/output (GPIO) of a Platform controller hub (PCH) chip, wherein the GPIO is connected to the short signal pin, and an input state value of the GPIO is determined according to a connection state of the short signal pin and a U.2 slot;

call the SMI program in response to a change in an input state of the GPIO being detected, and read the input state value of the GPIO; and

break a link between a Peripheral Component Interconnect Express (PCIe) root bridge and the NVMe solid-state disk by using the SMI program in response to the input state value of the GPIO being a corresponding value about the NVMe solid-state disk not in place;

wherein the step of breaking a link between a PCIe root bridge and the NVMe solid-state disk by using the SMI program comprises:

setting a link inhibit bit in a link controller by using the SMI program, wherein

the link inhibit bit is used to break the link between the PCIe root bridge and the NVMe solid-state disk, so as to discard input/output (IO) transaction data or return unsupported request responses in a communication direction from the PCIe root bridge to the NVMe solid-state disk, and to discard unfinished IO transaction data in a communication direction from the NVMe solid-state disk to the PCIe root bridge.

14 . The non-transitory computer-readable storage medium according to claim 13 , wherein the processing program, when executed by the processor, is configured to cause the processor to:

check an in-place state in a slot state register by using the SMI program; and

clear the link inhibit bit of the link controller to recover an original state in response to the NVMe solid-state disk being not in place, and exit the SMI program.

15 . The non-transitory computer-readable storage medium according to claim 13 , wherein the NVMe solid-state disk has a long signal pin, and after reading the input state value of the GPIO and the processing program, when executed by the processor, is configured to cause the processor to:

in response to the input state value of the GPIO being a corresponding value about the NVMe solid-state disk in place, skip processing a plugged device by the SMI program, return from the SMI program to recover a saved current state, and continue to execute an INTx interrupt program, wherein

the INTx interrupt program is generated in response to an in-place state of an in-place signal corresponding to the long signal pin changing.

16 . The non-transitory computer-readable storage medium according to claim 13 , wherein the processing program, when executed by the processor, is configured to cause the processor to:

store, in a Central Processing Unit (CPU), a value of a register in a System Management RAM (SMRAM) before entering a System Management Mode (SMM), and jump to an SMI ENTRY POINT for execution.

17 . The non-transitory computer-readable storage medium according to claim 13 , wherein the SMI program is in a form of software interrupt.