IP Library › Granted Patent US 12,456,994
Granted Patent B2
US 12,456,994 · App. 18/268,381 · Granted Oct 28, 2025

Signal processing device, signal processing method, and non-transitory computer readable medium

Inventors: Takuji Mochizuki (Tokyo, JP); Kazuhiro Ishida (Tokyo, JP)
Assignee: NEC CORPORATION
H04B1/0475H04B2001/0408
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Quick Facts
Patent No.
US 12,456,994
App. No.
18/268,381
Filed
Jun 20, 2023
Granted
Oct 28, 2025
Kind
B2
Art Unit
2649
USPC
455/114.3
Abstract

A signal processing device according to an example embodiment includes: a distortion compensation circuit configured to execute distortion compensation processing of compensating for nonlinear distortion on an input signal, and output a signal subjected to the distortion compensation processing; an amplifier configured to amplify the signal output from the distortion compensation circuit and output the amplified signal as a communication signal; and a signal output circuit configured to output an adjustment signal for adjusting the distortion compensation processing to the distortion compensation circuit as the input signal at a timing at which the communication signal is not output, the adjustment signal having a frequency band that covers a frequency band of the communication signal.

Claims (25)

1. A signal processing device comprising:

a distortion compensation circuit configured to execute distortion compensation processing of compensating for nonlinear distortion on an input signal, and output a signal subjected to the distortion compensation processing;

an amplifier configured to amplify the signal output from the distortion compensation circuit and output the amplified signal as a communication signal for communication; and

a signal output circuit configured to output an adjustment signal for adjusting the distortion compensation processing to the distortion compensation circuit as the input signal at a timing at which the communication signal is not output, the adjustment signal having a frequency band that covers a frequency band of the communication signal.

2. The signal processing device according to claim 1 , wherein the signal output circuit outputs, as the adjustment signal, a signal modulated by orthogonal frequency division multiplexing (OFDM) or spread spectrum.

3. The signal processing device according to claim 1 , wherein the signal output circuit outputs the adjustment signal at a timing that does not overlap with that of a calibration signal output during a calibration operation of the signal processing device.

4. The signal processing device according to claim 3 , wherein

the frequency band of the adjustment signal covers a frequency band of the calibration signal, and

the adjustment signal is output at a timing before the calibration signal.

5. The signal processing device according to claim 1 , further comprising a transmitter between the distortion compensation circuit and the amplifier,

wherein the signal output circuit outputs the adjustment signal in at least one of a period in which the transmitter transitions from off to on before a data slot of the communication signal or a period in which the transmitter transitions from on to off after the data slot of the communication signal.

6. The signal processing device according to claim 1 , wherein the signal output circuit outputs, as the adjustment signal, a signal having a signal peak at a beginning of a signal period.

7. The signal processing device according to claim 1 , wherein the signal processing device is a wireless communication device further comprising wireless transmission circuit for wirelessly transmitting an output signal from the amplifier.

8. The signal processing device according to claim 7 , wherein

the signal processing device comprises a plurality of the amplifiers,

the wireless transmission circuit includes a plurality of antennas corresponding to the plurality of amplifiers, and

the plurality of antennas wirelessly transmit the adjustment signals in such a way that a phase is different between adjacent antennas.

9. A signal processing method comprising:

executing, by a distortion compensation circuit, distortion compensation processing of compensating for nonlinear distortion on an input signal, and outputting a signal subjected to the distortion compensation processing;

amplifying the signal output from the distortion compensation circuit and outputting the amplified signal as a communication signal for communication; and

outputting an adjustment signal for adjusting the distortion compensation processing to the distortion compensation circuit as the input signal at a timing at which the communication signal is not output, the adjustment signal having a frequency band that covers a frequency band of the communication signal.

10. A non-transitory computer readable medium storing a program for causing a computer to perform:

executing, by a distortion compensation circuit, distortion compensation processing of compensating for nonlinear distortion on an input signal, and outputting a signal subjected to the distortion compensation processing;

amplifying the signal output from the distortion compensation circuit and outputting the amplified signal as a communication signal for communication; and

outputting an adjustment signal for adjusting the distortion compensation processing to the distortion compensation circuit as the input signal at a timing at which the communication signal is not output, the adjustment signal having a frequency band that covers a frequency band of the communication signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2023
From: MOCHIZUKI, TAKUJI; ISHIDA, KAZUHIRO
To: NEC CORPORATION
Reel/Frame 063994/0514 →
Priority Claims (1)
JP 2020-217508 · Dec 25, 2020 · national
Continuity (1)
Related Publication 20240072832A1 · Feb 29, 2024
References Cited (49)
US 6172560B1 · Yamashita · 2001 [cited by examiner]
US 6907025B2 · Demir · 2005 [cited by examiner]
US 7310381B2 · Dinur · 2007 [cited by examiner]
US 7463697B2 · Maltsev · 2008 [cited by examiner]
US 7531922B1 · Olson · 2009 [cited by examiner]
US 7596125B2 · Alpaslan · 2009 [cited by examiner]
US 7839951B2 · Cai · 2010 [cited by examiner]
US 8086194B2 · Koga · 2011 [cited by examiner]
US 8320497B2 · Behzad · 2012 [cited by examiner]
US 8867661B2 · Behzad · 2014 [cited by examiner]
US 9769003B2 · Bogdan · 2017 [cited by examiner]
US 10075204B2 · Bogdan · 2018 [cited by examiner]
US 10623049B2 · Zhang · 2020 [cited by examiner]
US 10985951B2 · Li · 2021 [cited by examiner]
US 11451419B2 · Li · 2022 [cited by examiner]
US 11456762B2 · Mochizuki · 2022 [cited by examiner]
US 11664836B2 · Huang · 2023 [cited by examiner]
US 11855813B2 · Li · 2023 [cited by examiner]
US 11863210B2 · Megretski · 2024 [cited by examiner]
US 12003350B1 · McCormick · 2024 [cited by examiner]
US 12273221B2 · Li · 2025 [cited by examiner]
US 20040243258A1 · Shattil · 2004 [cited by examiner]
US 20040252785A1 · Demir · 2004 [cited by examiner]
US 20090059782A1 · Cole · 2009 [cited by examiner]
US 20090153132A1 · Tufillaro · 2009 [cited by examiner]
US 20090207896A1 · Behzad · 2009 [cited by examiner]
US 20090207936A1 · Behzad · 2009 [cited by examiner]
US 20090310705A1 · Fujimoto · 2009 [cited by examiner]
US 20100226446A1 · Koga · 2010 [cited by examiner]
US 20130230083A1 · Behzad · 2013 [cited by examiner]
US 20150061761A1 · Wills · 2015 [cited by examiner]
US 20150312078A1 · Bogdan · 2015 [cited by examiner]
US 20190280730A1 · Zhang · 2019 [cited by examiner]
US 20210391879A1 · Mochizuki · 2021 [cited by examiner]
US 20230388171A1 · Bogdan · 2023 [cited by examiner]
JP H09102759A · 1997 [cited by applicant]
JP 2010283779A · 2010 [cited by applicant]
JP 2012231270A · 2012 [cited by applicant]
JP 2012244553A · 2012 [cited by applicant]
JP 2015511802A · 2015 [cited by applicant]
JP 2017220744A · 2017 [cited by examiner]
JP 2019536381A · 2019 [cited by applicant]
JP 2020136772A · 2020 [cited by applicant]
WO 2008111471A1 · 2008 [cited by applicant]
WO 2020144889A1 · 2020 [cited by applicant]
Ashida Junya, “Distortion compensation circuit, distortion compensation method, and transmitter”, 11 pages (Year: 2017). [cited by examiner]
International Search Report for PCT Application No. PCT/JP2021/019815, mailed on Jul. 20, 2021. [cited by applicant]
JP Office Action for Japanese Patent Application No. 2022-571016, mailed on Sep. 3, 2024 with English Translation. [cited by applicant]
JP Office Action for Japanese Patent Application No. 2022-571016, mailed on May 21, 2024 with English Translation. [cited by applicant]