IP Library Granted Patent US 12,517,855
Granted Patent B2
US 12,517,855 · App. 18/286,829 · Granted Jan 6, 2026

Event-driven readout system with non-priority arbitration for multichannel data sources

Inventors: Dominik Stanislaw Gorni (Carle Place, NY); Grzegorz W. Deptuch (Great Neck, NY); Sandeep Miryala (Austin, TX)
Assignee: Brookhaven Science Associates, LLC
G06F13/4031
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,517,855
App. No.
18/286,829
Granted
Jan 6, 2026
Kind
B2
Abstract

An event-driven readout management system includes non-priority access arbitration of a plurality of channels. The system includes an arbitration tree circuit, response circuit, in-channel logic circuit, and output periphery circuit. The arbitration tree circuit determines to which of the plurality of channels to grant access to a common signal transfer resource shared by the plurality of channels based on a readout access request provided by at least one of the plurality of channels. The arbitration tree circuit terminates a prior readout transaction and commences a subsequent readout transaction in response to a single edge of a clock signal. The in-channel logic circuit terminates the prior readout transaction and commences the subsequent readout transaction in response to receiving an acknowledge token. The output periphery circuit converts information received from the plurality of channels into an output format on the common signal transfer resource.

Claims (39)

1 . An event-driven readout management system comprising non-priority access arbitration of a plurality of channels, the system comprising:

an arbitration tree circuit, the arbitration tree circuit determining to which of the plurality of channels to grant access to a common signal transfer resource shared by the plurality of channels, the determination being based on a readout access request provided by at least one of the plurality of channels, the arbitration tree circuit excluding simultaneous occurrence of multiple readout access requests from the determination, the readout access request being received by the arbitration tree circuit and stored in the arbitration tree circuit until access is granted to the common signal transfer resource by the arbitration tree circuit, the arbitration tree circuit terminating a prior readout transaction and commencing a subsequent readout transaction in response to a single edge of a clock signal;

a response circuit, the response circuit operatively coupled to the arbitration tree circuit, a state of the clock signal representing an acknowledge token, the acknowledge token being provided to the arbitration tree circuit, the arbitration tree circuit using the acknowledge token to grant access to the common signal transfer resource;

an in-channel logic circuit, the in-channel logic circuit operatively coupled to the arbitration tree circuit, the in-channel logic circuit generating the readout access request and receiving the acknowledge token, the in-channel logic circuit terminating the prior readout transaction and commencing the subsequent readout transaction in response to receiving the acknowledge token; and

an output periphery circuit, the output periphery circuit converting information received from the plurality of channels into an output format on the common signal transfer resource.

2 . The system, as defined by claim 1 , wherein the common signal transfer resource comprises at least one of an analog signal transfer line, a digital signal transfer line.

3 . The system, as defined by claim 1 , wherein the readout access request is generated in response to an event, the event comprising activation of at least one of the plurality of channels to generate transferrable data.

4 . The system, as defined by claim 1 , wherein the readout transaction comprises a plurality of readout phases, at least one of the plurality of readout phases causing transfer of at least a portion of information from one of the plurality of channels to the common signal transfer resource.

5 . The system, as defined by claim 1 , wherein a duty cycle associated with the clock signal is selectable to define an acceptance time associated with the readout access request and to assure settling time associated with the common signal transfer resource.

6 . The system, as defined by claim 1 , wherein the determination further comprises determining, with a plurality of readout phases associated with the readout transaction, which channel of the plurality of channels is granted access to the common signal transfer resource independent of at least one of readout access requests stored in the arbitration tree circuit, readout access requests received, a relative position of the plurality of channels with respect to the arbitration tree circuit.

7 . The system, as defined by claim 1 , wherein a quantity of edges associated with the clock signal is equal to a quantity of readout phases associated with the readout transaction from one channel.

8 . The system, as defined by claim 1 , wherein the arbitration tree circuit operates asynchronously with the plurality of channels.

9 . The system, as defined by claim 1 , wherein the arbitration tree circuit operates synchronously with the output periphery circuit.

10 . The system, as defined by claim 1 , wherein the arbitration tree circuit operates synchronously with the in-channel logic circuit, the in-channel logic circuit operating asynchronously in generating the read access request, the duration of the acknowledge token defining an acceptance time window associated with the read access request for outputting data from at least one of the plurality of channels.

11 . The system, as defined by claim 1 , wherein a duty cycle of the acknowledge token signal is selectable to provide data settling time after granting access to the common signal transfer resource.

12 . The system, as defined by claim 1 , wherein the plurality of channels provides information to the common signal transfer resource such that a transmission order associated with concurrently requesting channels is independent of positions associated with the concurrently requesting channels within the arbitration tree circuit.

13 . The system, as defined by claim 1 , wherein the clock signal comprises a first state and a second state, the first state being defined as active and comprising an acknowledge token that enables new read access requests to be accepted, the second state disabling acceptance of a new read access request to avoid starting data transmission with insufficient data settling time after access is granted to the common signal transfer resource in response to acceptance of the new read access request if the acknowledge token is to be routed to a new channel.

14 . The system, as defined by claim 1 , wherein the readout access requests processed by the arbitration tree circuit comprise logical sums of readout access requests associated with at least one lower stage in the arbitration tree circuit.

15 . The system, as defined by claim 1 , wherein the readout access requests processed by the arbitration tree circuit comprise logical sums of result signals from arbitration between readout access requests.

16 . The system, as defined by claim 1 , wherein the readout access requests processed by the arbitration tree circuit comprise logical sums of result signals from arbitration between results of arbitration between readout access requests, entering arbitration cells, and the clock signal comprising acknowledge tokens in the arbitration cells.

17 . The system, as defined by claim 1 , wherein the readout access requests processed by the arbitration tree circuit comprise logical sums of result signals from arbitration between readout access requests, entering arbitration cells, and the clock signal comprising acknowledge tokens in the arbitration cells.

18 . A method of non-priority arbitration of a plurality of channels using an event-driven readout management system, the method comprising:

determining, using an arbitration tree circuit, to which of the plurality of channels to grant access to a common signal transfer resource shared by the plurality of channels, the determination based on a readout access request provided by at least one of the plurality of channels;

excluding, using the arbitration tree circuit, simultaneous occurrence of multiple readout access requests from the determination;

receiving and storing the readout access requests in the arbitration tree circuit until access is granted to the common signal transfer resource by the arbitration tree circuit;

terminating, using the arbitration tree circuit, a prior readout transaction and commencing a subsequent readout transaction in response to a single edge of a clock signal;

providing an acknowledge token to the arbitration tree circuit, the arbitration tree circuit using the acknowledge token to grant access to the common signal transfer resource, a state of the clock signal representing the acknowledge token;

generating, using an in-channel logic circuit, the readout access request and receiving the acknowledge token, the in-channel logic circuit operatively coupled to the arbitration tree circuit;

terminating, using the in-channel logic circuit, the prior readout transaction and commencing the subsequent readout transaction in response to receiving the acknowledge token; and

converting, using an output periphery circuit, information received from the plurality of channels into an output format on the common signal transfer resource.

19 . A non-transitory computer-readable medium comprising instructions that, when executed by a processing device, perform operations comprising:

determining, using an arbitration tree circuit, to which of the plurality of channels to grant access to a common signal transfer resource shared by the plurality of channels, the determination based on a readout access request provided by at least one of the plurality of channels;

excluding, using the arbitration tree circuit, simultaneous occurrence of multiple readout access requests from the determination;

receiving and storing the readout access requests in the arbitration tree circuit until access is granted to the common signal transfer resource by the arbitration tree circuit;

terminating, using the arbitration tree circuit, a prior readout transaction and commencing a subsequent readout transaction in response to a single edge of a clock signal;

providing an acknowledge token to the arbitration tree circuit, the arbitration tree circuit using the acknowledge token to grant access to the common signal transfer resource, a state of the clock signal representing the acknowledge token;

generating, using an in-channel logic circuit, the readout access request and receiving the acknowledge token, the in-channel logic circuit operatively coupled to the arbitration tree circuit;

terminating, using the in-channel logic circuit, the prior readout transaction and commencing the subsequent readout transaction in response to receiving the acknowledge token; and

converting, using an output periphery circuit, information received from the plurality of channels into an output format on the common signal transfer resource.

Assignments (2)
CONFIRMATORY LICENSE Recorded Aug 23, 2024
From: BROOKHAVEN SCIENCE ASSOCIATES
To: U.S. DEPARTMENT OF ENERGY
Reel/Frame 068386/0378 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2024
From: DEPTUCH, GRZEGORZ W.; MIRYALA, SANDEEP; GORNI, DOMINIK STANISLAW
To: BROOKHAVEN SCIENCE ASSOCIATES, LLC
Reel/Frame 067400/0442 →
Continuity (3)
Provisional Application 63244692 · Sep 15, 2021
Provisional Application 63175625 · Apr 16, 2021
Related Publication 20240193116A1 · Jun 13, 2024
References Cited (39)
US 5301333A · Lee · 1994 [cited by examiner]
US 6487213B1 · Chao · 2002 [cited by examiner]
US 8271700B1 · Annem et al. · 2012 [cited by applicant]
US 8498941B2 · Felsher · 2013 [cited by applicant]
US 8869150B2 · Sundararaman et al. · 2014 [cited by applicant]
US 10352991B2 · Fahim et al. · 2019 [cited by applicant]
US 11889208B2 · Segura Puchades · 2024 [cited by examiner]
US 11929940B1 · Featherston · 2024 [cited by examiner]
US 20040210696A1 · Meyer · 2004 [cited by examiner]
US 20050177633A1 · Plunkett · 2005 [cited by applicant]
US 20050240707A1 · Hayashi · 2005 [cited by examiner]
US 20060026330A1 · Yi et al. · 2006 [cited by applicant]
US 20070053513A1 · Hoffberg · 2007 [cited by applicant]
US 20120120468A1 · Binkert · 2012 [cited by examiner]
US 20190171488A1 · Howe et al. · 2019 [cited by applicant]
US 20210002683A1 · Talagala et al. · 2021 [cited by applicant]
KR 100606701B1 · 2006 [cited by applicant]
KR 1020090118610A · 2009 [cited by applicant]
Deptuch, “Large Analysis of RStrobe and RStrobe-less Solution VIPIC 1—First Brief Look”, URL: https://lss.fnal.gov/archive/test-tm/2000/fermilab-tm-2709-ppd.pdf, 2019. [cited by applicant]
Shapiro et al., “Progress on the Design of a Data Push Architecture for an Array of Optimized Time Tagging Pixels”, URL: https://www.slac.stanford.edu/pubs/slacpubs/6000/slac-pub-6249.pdf, 1993. [cited by applicant]
Mani et al., “An Asynchronous Data Acquisition Asic With a Data Push Architecture”, Nuclear Instruments and Methods in Physics Research, vol. 360, pp. 345-348, 1995. [cited by applicant]
Lin et al., “ASIC Implementation of a Data Push Architecture for Silicon Pixel Readout”, 1994 Meeting of the American Physical Society, Division of Particles and Fields (DPF 94), 1994. [cited by applicant]
Deptuch et al., “Vertically Integrated Pixel Readout Chip for High Energy Physics”, Government Microcircuit Applications & Critical Technology Conference—GomacTech 11, 2011. [cited by applicant]
Deptuch et al., “A Vertically Integrated Pixel Readout Device for the Vertex Detector at the International Linear Collider”, IEEE Transactions on Nuclear Science, vol. 57, pp. 880-890, 2010. [cited by applicant]
Yang et al., “Low-Power Priority Address-Encoder and Reset-Decoder Data-Driven Readout for Monolithic Active Pixel Sensors for Tracker System”, Nuclear Instruments and Methods in Physics Research Section A: Accelerators… [cited by applicant]
Yang et al., “AMonolithic Active Pixel Sensor Prototype for the CEPC Vertex Detector”, Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, vol.… [cited by applicant]
Lee et al., “A Low Power Priority Encoding Technique with Address-Encoder and Reset-Decoder for an Improved Hierarchical Asynchronous Detector”, 2018 15th International Conference on Synthesis, Modeling, Analysis and Si… [cited by applicant]
Deptuch et al., “Design and Tests of the Vertically Integrated Photon Imaging Chip”, IEEE Transactions on Nuclear Science, pp. 663-674, 2014. [cited by applicant]
Georgiou et al., “High-Speed, Address-Encoding Arbiter Architecture”, Electronics Letters, vol. 42, pp. 170-171, vol. 3, 2006. [cited by applicant]
Rovere et al., “Design of a QDI Asynchronous AER Serializer/Deserializer Link in 180nm for Event-Based Sensors for Robotic Applications”, 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015. [cited by applicant]
Liu et al., “Event-Based Neuromorphic Systems”, URL: https://onlinelibrary.wiley.com/doi/pdf/10.1002/9781118927601.fmatter, Chapter 2, pp. 9-36, 2015. [cited by applicant]
Fahim et al., “A Low-Power, High-Speed Readout for Pixel Detectors Based on an Arbitration Tree”, IEEE Transactions on Very Large-Scale Integration (VLSI) Systems, vol. 28, pp. 576-584, 2020. [cited by applicant]
Turko et al., “An Asynchronous Fixed Priority Arbiter for High Throughput Time Correlated Single Photon Counting Systems”, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Bordeaux, … [cited by applicant]
International Search Report and Written Opinion received for PCT Application No. PCT/US2022/022707, dated Jul. 12, 2022, 10 pages. [cited by applicant]
European Search Report received for PCT Application No. PCT/US2022/022707, dated Jan. 28, 2025, 9 pages. [cited by applicant]
Boahen, K., “A Throughput-On-Demand Address-Event Transmitter for Neuromorphic Chips,” Proceedings 20th Anniversary Conference on Advanced Research in VLSI, IEEE, Georgia, USA, Mar. 21-24, 1999 pp. 72-86, 15 pages. [cited by applicant]
Niclass, C., et al., “A CMOS 64×48 Single Photon Avalanche Diode Array with Event-Driven Readout,” 2006 Proceedings of the 32nd European Solid-State Circuits Conference, Montreaux, Switzerland (2006) pp. 556-559. [cited by applicant]
Ara Shawkat, M. S., et al., “A Cmos Perimeter Gated SPAD Based Digital Silicon Photomultiplier with Asynchronous AER Readout for PET Applications,” IEEE Biomedical Circuits and Systems Conference (BioCAS), Cleveland, OH… [cited by applicant]
Thu Linn, A. M., et al., “Adaptive priority toggle asynchronous tree arbiter for AER-based image sensor,” IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, Hong Kong, China (2011) pp. 66-71. [cited by applicant]