Granted Patent B2

US 12,437,715 · App. 18/290,793 · Granted Oct 7, 2025

Inventor: Lei Zhu (Beijing, CN)

Assignees: Chongqing BOE Display Technology Co., Ltd.; BOE Technology Group Co., Ltd.

G09G3/3233G09G2300/0852G09G2310/061G09G2310/08

Abstract

Claims (72)

1. A pixel circuit, applicable to a display apparatus and comprising:

a first storage sub-circuit, connected between a first node and a second node;

a driving sub-circuit, connected to the first node, a third node, and a fourth node, to control connection or disconnection between the third node and the fourth node under control of the first node; wherein the third node is connected to a first power supply terminal;

a light-emitting control sub-circuit, connected to the fourth node and a first electrode of a sub-pixel, to control connection or disconnection between the fourth node and the first electrode of the sub-pixel;

a second storage sub-circuit, connected to the first node, to store a potential of the first node;

a data writing sub-circuit, connected to the second node, to input a voltage to the second node, wherein the second node is disposed between the data writing sub-circuit and the first storage sub-circuit; and

a compensation sub-circuit, connected to a first scanning signal terminal and the first node, wherein the compensation sub-circuit is directly connected to the first node;

wherein the compensation sub-circuit is further connected to the third node, to control connection or disconnection between the first node and the third node under control of the first scanning signal terminal; or,

the compensation sub-circuit is further connected to the fourth node, to control connection or disconnection between the first node and the fourth node under the control of the first scanning signal terminal.

2. The pixel circuit of claim 1 , wherein in a display frame of the display apparatus, a driving process of the pixel circuit comprises a compensation stage and a data writing stage;

in the compensation stage, the compensation sub-circuit controls the connection between the first node and the third node or the fourth node, the third node is connected to the first power supply terminal, and the data writing sub-circuit inputs a first voltage to the second node; and

in the data writing stage, the data writing sub-circuit inputs a second voltage to the second node, wherein the first voltage is different from the second voltage.

3. The pixel circuit of claim 2 , wherein the data writing stage comprises a first stage and a second stage;

in the first stage, the compensation sub-circuit controls the connection between the first node and the third node or the fourth node, the third node is connected to the first power supply terminal, and the data writing sub-circuit inputs the second voltage to the second node; and

in the second stage, the compensation sub-circuit controls the disconnection between the first node and the third node or the fourth node, and the data writing sub-circuit inputs the second voltage to the second node.

4. The pixel circuit of claim 1 , further comprising:

a first reset sub-circuit, connected to a reset signal terminal, a first initialization signal terminal, and the first node, to control connection or disconnection between the first initialization signal terminal and the first node under control of the reset signal terminal.

5. The pixel circuit of claim 4 , wherein the first reset sub-circuit comprises:

a first reset transistor, wherein a control electrode of the first reset transistor is connected to the reset signal terminal, a first electrode of the first reset transistor is connected to the first initialization signal terminal, and a second electrode of the first reset transistor is connected to the first node.

6. The pixel circuit of claim 1 , further comprising:

a second reset sub-circuit, connected to the first scanning signal terminal, a second initialization signal terminal, and the first electrode of the sub-pixel, to control connection or disconnection between the second initialization signal terminal and the first electrode of the sub-pixel under the control of the first scanning signal terminal;

wherein the second reset sub-circuit comprises:

a second reset transistor, wherein a control electrode of the second reset transistor is connected to the first scanning signal terminal, a first electrode of the second reset transistor is connected to the second initialization signal terminal, and a second electrode of the second reset transistor is connected to the first electrode of the sub-pixel.

7. The pixel circuit of claim 1 , wherein the data writing sub-circuit comprises:

a data writing transistor, wherein a control electrode of the data writing transistor is connected to a second scanning signal terminal, a first electrode of the data writing transistor is connected to a data signal terminal, and a second electrode of the data writing transistor is connected to the second node.

8. The pixel circuit of claim 1 , wherein the driving sub-circuit comprises:

a driving transistor, wherein a control electrode of the driving transistor is connected to the first node, a first electrode of the driving transistor is connected to the third node, and a second electrode of the driving transistor is connected to the fourth node.

9. The pixel circuit of claim 1 , wherein the compensation sub-circuit comprises:

a compensation transistor, wherein a control electrode of the compensation transistor is connected to the first scanning signal terminal, a first electrode of the compensation transistor is connected to the third node or the fourth node, and a second electrode of the compensation transistor is connected to the first node.

10. The pixel circuit of claim 1 , wherein the light-emitting control sub-circuit is further connected to the first power supply terminal and the third node, to control connection or disconnection between the first power supply terminal and the third node.

11. The pixel circuit of claim 10 , wherein the light-emitting control sub-circuit comprises a first light-emitting control transistor connected in series between the first power supply terminal and the third node.

12. The pixel circuit of claim 1 , wherein the light-emitting control sub-circuit further comprises a second light-emitting control transistor connected in series between the fourth node and the first electrode of the sub-pixel.

13. The pixel circuit of claim 1 , wherein the first storage sub-circuit comprises a first capacitor and the second storage sub-circuit comprises a second capacitor, and the second capacitor comprises a first electrode connected to the first node and a second electrode connected to a second power supply terminal that is different from the first power supply terminal.

14. A method for driving a pixel circuit, comprising:

causing a driving sub-circuit to control connection or disconnection between a third node and a fourth node under control of a first node;

causing a light-emitting control sub-circuit to control connection or disconnection between the fourth node and a first electrode of a sub-pixel;

causing a second storage sub-circuit to store a potential of the first node;

causing a data writing sub-circuit to input a voltage to a second node; and

causing a compensation sub-circuit to control connection or disconnection between the first node and the third node under control of a first scanning signal terminal; or, causing the compensation sub-circuit to control connection or disconnection between the first node and the fourth node under the control of the first scanning signal terminal;

wherein the pixel circuit is applicable to a display apparatus and comprises:

a first storage sub-circuit, connected between the first node and the second node;

the driving sub-circuit, connected to the first node, the third node, and the fourth node, to control the connection or the disconnection between the third node and the fourth node under the control of the first node; wherein the third node is connected to a first power supply terminal;

the light-emitting control sub-circuit, connected to the fourth node and the first electrode of the sub-pixel, to control the connection or the disconnection between the fourth node and the first electrode of the sub-pixel;

the second storage sub-circuit, connected to the first node, to store the potential of the first node;

the data writing sub-circuit, connected to the second node, to input the voltage to the second node, wherein the second node is disposed between the data writing sub-circuit and the first storage sub-circuit; and

the compensation sub-circuit, connected to the first scanning signal terminal and the first node, wherein the compensation sub-circuit is directly connected to the first node;

wherein the compensation sub-circuit is further connected to the third node, to control the connection or the disconnection between the first node and the third node under the control of the first scanning signal terminal; or,

the compensation sub-circuit is further connected to the fourth node, to control the connection or the disconnection between the first node and the fourth node under the control of the first scanning signal terminal.

15. A display apparatus, comprising: a pixel circuit and a sub-pixel connected to the pixel circuit;

wherein the pixel circuit comprises:

a first storage sub-circuit, connected between a first node and a second node;

a driving sub-circuit, connected to the first node, a third node, and a fourth node, to control connection or disconnection between the third node and the fourth node under control of the first node; wherein the third node is connected to a first power supply terminal;

a light-emitting control sub-circuit, connected to the fourth node and a first electrode of the sub-pixel, to control connection or disconnection between the fourth node and the first electrode of the sub-pixel;

a second storage sub-circuit, connected to the first node, to store a potential of the first node;

a data writing sub-circuit, connected to the second node, to input a voltage to the second node, wherein the second node is disposed between the data writing sub-circuit and the first storage sub-circuit; and

a compensation sub-circuit, connected to a first scanning signal terminal and the first node, wherein the compensation sub-circuit is directly connected to the first node;

wherein the compensation sub-circuit is further connected to the third node, to control connection or disconnection between the first node and the third node under control of the first scanning signal terminal; or,

the compensation sub-circuit is further connected to the fourth node, to control connection or disconnection between the first node and the fourth node under the control of the first scanning signal terminal.

16. The display apparatus of claim 15 , wherein in a display frame of the display apparatus, a driving process of the pixel circuit comprises a compensation stage and a data writing stage;

in the compensation stage, the compensation sub-circuit controls the connection between the first node and the third node or the fourth node, the third node is connected to the first power supply terminal, and the data writing sub-circuit inputs a first voltage to the second node; and

in the data writing stage, the data writing sub-circuit inputs a second voltage to the second node, wherein the first voltage is different from the second voltage.

17. The display apparatus of claim 16 , wherein the data writing stage comprises a first stage and a second stage;

in the first stage, the compensation sub-circuit controls the connection between the first node and the third node or the fourth node, the third node is connected to the first power supply terminal, and the data writing sub-circuit inputs the second voltage to the second node; and

in the second stage, the compensation sub-circuit controls the disconnection between the first node and the third node or the fourth node, and the data writing sub-circuit inputs the second voltage to the second node.

18. The display apparatus of claim 15 , wherein the pixel circuit further comprises:

a first reset sub-circuit, connected to a reset signal terminal, a first initialization signal terminal, and the first node, to control connection or disconnection between the first initialization signal terminal and the first node under control of the reset signal terminal.

19. The display apparatus of claim 18 , wherein the first reset sub-circuit comprises:

a first reset transistor, wherein a control electrode of the first reset transistor is connected to the reset signal terminal, a first electrode of the first reset transistor is connected to the first initialization signal terminal, and a second electrode of the first reset transistor is connected to the first node.

20. The display apparatus of claim 15 , wherein the pixel circuit further comprises:

a second reset sub-circuit, connected to the first scanning signal terminal, a second initialization signal terminal, and the first electrode of the sub-pixel, to control connection or disconnection between the second initialization signal terminal and the first electrode of the sub-pixel under the control of the first scanning signal terminal;

wherein the second reset sub-circuit comprises:

a second reset transistor, wherein a control electrode of the second reset transistor is connected to the first scanning signal terminal, a first electrode of the second reset transistor is connected to the second initialization signal terminal, and a second electrode of the second reset transistor is connected to the first electrode of the sub-pixel.

Assignments (1)

Continuity (1)

References Cited (26)