IP Library › Granted Patent US 12,550,569
Granted Patent B2
US 12,550,569 · App. 18/297,052 · Granted Feb 10, 2026

Display device and manufacturing method thereof

Inventors: Joon Seok Park (Yongin-si, KR); Jongdo Keum (Yongin-si, KR); Hyoung Do Kim (Yongin-si, KR); Yun Yong Nam (Yongin-si, KR); Chul Won Park (Yongin-si, KR); Kilim Han (Yongin-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H10K59/1315H10K59/1201H10K59/124
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Quick Facts
Patent No.
US 12,550,569
App. No.
18/297,052
Granted
Feb 10, 2026
Kind
B2
Abstract

A display device includes: a substrate; a conductive pattern layer disposed on the substrate; a buffer layer disposed on the conductive pattern layer; an active pattern layer disposed on the buffer layer and including a channel region and a conductive region adjacent to the channel region; an insulating pattern layer disposed on the channel region; an oxide pattern layer disposed on the insulating pattern layer; a gate electrode disposed on the oxide pattern layer; and a connecting member electrically connected to the conductive pattern layer and the conductive region. The connecting member and the oxide pattern layer include a same material.

Claims (87)

1 . A display device comprising:

a substrate;

a conductive pattern layer disposed on the substrate;

a buffer layer disposed on the conductive pattern layer;

an active pattern layer disposed on the buffer layer and including a channel region and a conductive region adjacent to the channel region;

an insulating pattern layer disposed on the channel region;

an oxide pattern layer disposed on the insulating pattern layer;

a gate electrode disposed on the oxide pattern layer; and

a connecting member electrically connected to the conductive pattern layer and the conductive region, wherein

the connecting member and the oxide pattern layer include a same material.

2 . The display device of claim 1 , wherein

the oxide pattern layer and the connecting member include an oxide semiconductor.

3 . The display device of claim 2 , wherein

a carrier concentration of the connecting member is higher than a carrier concentration of the oxide pattern layer.

4 . The display device of claim 3 , further comprising:

a first insulating layer disposed between the connecting member and the buffer layer, wherein

the first insulating layer and the insulating pattern layer include a same insulating material.

5 . The display device of claim 4 , wherein

the first insulating layer and the buffer layer have a first opening exposing the conductive pattern layer,

the conductive region includes a first conductive region adjacent to a first side of the channel region, and

the connecting member includes a first connecting member electrically connected to the conductive pattern layer and the first conductive region through the first opening.

6 . The display device of claim 5 , further comprising:

a second insulating layer disposed on the gate electrode and the connecting member, wherein

the second insulating layer contacts an upper surface of the gate electrode and an upper surface of the connecting member.

7 . The display device of claim 6 , further comprising:

a third insulating layer disposed on the second insulating layer; and

a pixel electrode disposed on the third insulating layer, wherein

the second insulating layer and the third insulating layer have a second opening exposing the first connecting member, and

the pixel electrode is electrically connected to the first connecting member through the second opening.

8 . The display device of claim 5 , further comprising:

a driving voltage line, the driving voltage line and the conductive pattern layer including a same conductive material, wherein

the first insulating layer and the buffer layer have a third opening exposing the driving voltage line,

the conductive region includes a second conductive region adjacent to a second side of the channel region, and

the connecting member includes a second connecting member electrically connected to the driving voltage line and the second conductive region through the third opening.

9 . The display device of claim 1 , wherein

an edge portion of the gate electrode, an edge portion of the oxide pattern layer, and an edge portion of the insulating pattern layer are aligned with each other.

10 . The display device of claim 9 , wherein

the edge portion of the insulating pattern layer is aligned with a boundary area between the channel region and the conductive region.

11 . A display device comprising:

a substrate;

a first conductive layer including a conductive pattern layer disposed on the substrate;

a buffer layer disposed on the first conductive layer;

an active pattern layer disposed on the buffer layer and including a channel region and a conductive region adjacent to the channel region;

a first insulating layer including an insulating pattern layer disposed on the channel region;

an oxide pattern layer disposed on the insulating pattern layer;

a connecting member disposed on the first insulating layer; and

a gate electrode disposed on the oxide pattern layer, wherein

the connecting member is electrically connected to the conductive pattern layer and the conductive region, and

the connecting member and the oxide pattern layer include a same material.

12 . The display device of claim 11 , wherein

a carrier concentration of the connecting member is higher than a carrier concentration of the oxide pattern layer.

13 . The display device of claim 11 , wherein

the first insulating layer and the buffer layer have a first opening exposing the conductive pattern layer,

the conductive region includes a first conductive region adjacent to a first side of the channel region, and

the connecting member includes a first connecting member electrically connected to the conductive pattern layer and the first conductive region through the first opening.

14 . The display device of claim 13 , further comprising:

a second insulating layer disposed on the gate electrode and the connecting member, wherein

the second insulating layer contacts an upper surface of the gate electrode and an upper surface of the connecting member.

15 . The display device of claim 14 , further comprising:

a third insulating layer disposed on the second insulating layer; and

a pixel electrode disposed on the third insulating layer, wherein

the second insulating layer and the third insulating layer have a second opening exposing the first connecting member, and

the pixel electrode is electrically connected to the first connecting member through the second opening.

16 . The display device of claim 15 , wherein

a conductive layer is not disposed between the second insulating layer and the third insulating layer.

17 . The display device of claim 13 , wherein

the first conductive layer further includes a driving voltage line,

the driving voltage line and the conductive pattern layer include a same conductive material,

the first insulating layer and the buffer layer have a third opening exposing the driving voltage line,

the conductive region includes a second conductive region adjacent to a second side of the channel region, and

the connecting member includes a second connecting member electrically connected to the driving voltage line and the second conductive region through the third opening.

18 . A method for manufacturing a display device, the method comprising:

forming a first conductive layer including a conductive pattern layer on a substrate;

forming a buffer layer on the first conductive layer;

forming a semiconductor layer on the buffer layer;

forming a first insulating layer on the semiconductor layer;

forming a first opening exposing a part of the first conductive layer and a second opening exposing a part of the semiconductor layer by patterning the first insulating layer and the buffer layer;

forming an oxide layer on the first insulating layer;

forming a second conductive layer on the oxide layer;

forming an oxide pattern layer and a gate electrode disposed on the oxide pattern layer by patterning the second conductive layer and the oxide layer;

exposing an upper surface of the oxide layer without exposing an upper surface of the oxide pattern layer by removing the second conductive layer without removing the gate electrode;

forming an insulating pattern layer disposed below the oxide pattern layer by patterning the first insulating layer; and

making the oxide layer conductive to form a conductive oxide layer.

19 . The method of claim 18 , wherein

the conductive oxide layer is electrically connected to the part of the first conductive layer through the first opening.

20 . The method of claim 18 , further comprising:

heat-treating the oxide layer after the forming of the oxide layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 7, 2023
From: PARK, JOON SEOK; KEUM, JONGDO; KIM, HYOUNG DO; NAM, YUN YONG; PARK, CHUL WON; HAN, KILIM
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 063255/0759 →
Priority Claims (1)
KR 10-2022-0096804 · Aug 3, 2022 · national
Continuity (1)
Related Publication 20240049544A1 · Feb 8, 2024
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