Resonant flyback power converter and switching control circuit and method thereof
A resonant flyback power converter includes: a first transistor and a second transistor which are configured to switch a transformer and a resonant capacitor for generating an output voltage; and a switching control circuit generating first and second driving signals for controlling the first and the second transistors. The turn-on of the first driving signal magnetizes the transformer. The second driving signal includes a resonant pulse having a resonant pulse width and a ZVS pulse during the DCM operation. The resonant pulse is configured to demagnetize the transformer. The resonant pulse has a first minimum resonant period for a first level of the output load and a second minimum resonant period for a second level of the output load. The first level is higher than the second level and the second minimum resonant period is shorter than the first minimum resonant period.
1. A resonant flyback power converter, comprising:
a first transistor and a second transistor which are configured to form a half-bridge circuit;
a transformer and a resonant capacitor which are connected in series and are coupled to the half-bridge circuit; and
a switching control circuit configured to operably generate a first driving signal and a second driving signal to control the first transistor and the second transistor respectively for switching the transformer and the resonant capacitor to generate an output voltage;
wherein the turn-on of the first driving signal magnetizes the transformer, the on-time of the first driving signal is decreased in response to the decrease of an output load of the resonant flyback power converter;
wherein the second driving signal is configured to discharge the resonant capacitor, wherein the second driving signal includes a resonant pulse having a resonant pulse width and a ZVS (zero voltage switching) pulse having a ZVS pulse width during a DCM (discontinuous conduction mode) operation;
wherein the resonant pulse has a first minimum resonant period for a first level of the output load and a second minimum resonant period for a second level of the output load, wherein the first level is higher than the second level and the second minimum resonant period is shorter than the first minimum resonant period.
2. The resonant flyback power converter as claimed in claim 1 , wherein the first minimum resonant period is decreased in response to the decrease of the output load.
3. The resonant flyback power converter as claimed in claim 2 , wherein the first minimum resonant period includes a first minimum resonant sub-period having a fixed period and a second minimum resonant sub-period having an adjustable period, wherein the adjustable period is decreased in response to the decrease of the output load.
4. The resonant flyback power converter as claimed in claim 1 , wherein the second minimum resonant period is a fixed value.
5. The resonant flyback power converter as claimed in claim 1 , wherein the ZVS pulse of the second driving signal is utilized to generate a circulated current for achieving the ZVS (zero voltage switching) of the first transistor.
6. The resonant flyback power converter as claimed in claim 1 , wherein the first minimum resonant period of the resonant pulse of the second driving signal is utilized to generate a resonant cycle during a demagnetizing period of the transformer, wherein the resonant cycle is related to a resonance of the resonant capacitor and the transformer.
7. The resonant flyback power converter as claimed in claim 1 , wherein the second driving signal is turned on with the resonant pulse to discharge the resonant capacitor after the turn off of the first driving signal, wherein the voltage level of the resonant capacitor is correlated to the voltage level of the output voltage within the resonant pulse.
8. The resonant flyback power converter as claimed in claim 1 , wherein during the DCM operation, the second driving signal further includes an off-time period which is started from the turn-off of the resonant pulse of the second driving signal, wherein the off-time period is increased in response to the decrease of the output load; wherein the first driving signal and the second driving signal are turned off during the off-time period.
9. The resonant flyback power converter as claimed in claim 8 , wherein the ZVS pulse having a ZVS pulse width is enabled at the end of the off-time period during the DCM operation.
10. A switching control circuit, configured to operably control a resonant flyback power converter, wherein the resonant flyback power converter includes a first transistor and a second transistor which are configured to form a half-bridge circuit, and a transformer and a resonant capacitor which are connected in series and are coupled to the half-bridge circuit, wherein the first transistor and the second transistor are configured to switch the transformer and the resonant capacitor to generate an output voltage; wherein the switching control circuit comprises:
a magnetizing control circuit, configured to operably generate a first driving signal to switch the first transistor; and
a resonant and ZVS control circuit, coupled to the magnetizing control circuit and configured to operably generate a second driving signal to switch the second transistor;
wherein the turn-on of the first driving signal magnetizes the transformer, the on-time of the first driving signal is decreased in response to the decrease of an output load of the resonant flyback power converter;
wherein the second driving signal is configured to discharge the resonant capacitor, wherein the second driving signal includes a resonant pulse having a resonant pulse width and a ZVS pulse having a ZVS pulse width during the DCM (discontinuous conduction mode) operation;
wherein the resonant pulse has a first minimum resonant period for a first level of the output load and a second minimum resonant period for a second level of the output load, wherein the first level is higher than the second level and the second minimum resonant period is shorter than the first minimum resonant period.
11. The switching control circuit as claimed in claim 10 , wherein the first minimum resonant period is decreased in response to the decrease of the output load.
12. The switching control circuit as claimed in claim 11 , wherein the first minimum resonant period includes a first minimum resonant sub-period having a fixed period and a second minimum resonant sub-period having an adjustable period, wherein the adjustable period is decreased in response to the decrease of the output load.
13. The switching control circuit as claimed in claim 10 , wherein the second minimum resonant period is a fixed value.
14. The switching control circuit as claimed in claim 10 , wherein the ZVS pulse of the second driving signal is utilized to generate a circulated current for achieving the ZVS (zero voltage switching) of the first transistor.
15. The switching control circuit as claimed in claim 10 , wherein the first minimum resonant period of the resonant pulse of the second driving signal is utilized to generate a resonant cycle during a demagnetizing period of the transformer, wherein the resonant cycle is related to a resonance of the resonant capacitor and the transformer.
16. The switching control circuit as claimed in claim 10 , wherein the second driving signal is turned on with the resonant pulse to discharge the resonant capacitor after the turn off of the first driving signal, wherein the voltage level of the resonant capacitor is correlated to the voltage level of the output voltage within the resonant pulse.
17. The switching control circuit as claimed in claim 10 , wherein during the DCM operation, the second driving signal further includes an off-time period which is started from the turn-off of the resonant pulse of the second driving signal, wherein the off-time period is increased in response to the decrease of the output load.
18. The switching control circuit as claimed in claim 10 , wherein the ZVS pulse having a ZVS pulse width is enabled at the end of the off-time period during the DCM operation.
19. A method, configured to operably control a resonant flyback power converter, wherein the resonant flyback power converter includes a first transistor and a second transistor which are configured to form a half-bridge circuit, and a transformer and a resonant capacitor which are connected in series and are coupled to the half-bridge circuit, wherein the first transistor and the second transistor are configured to switch the transformer and the resonant capacitor to generate an output voltage; wherein the method comprises:
generating a first driving signal to switch the first transistor; and
generating a second driving signal to switch the second transistor;
wherein the turn-on of the first driving signal magnetizes the transformer, the on-time of the first driving signal is decreased in response to the decrease of an output load of the resonant flyback power converter;
wherein the second driving signal is configured to discharge the resonant capacitor, wherein the second driving signal includes a resonant pulse having a resonant pulse width and a ZVS pulse having a ZVS pulse width during a DCM (discontinuous conduction mode) operation;
wherein the resonant pulse has a first minimum resonant period for a first level of the output load and a second minimum resonant period for a second level of the output load, wherein the first level is higher than the second level and the second minimum resonant period is shorter than the first minimum resonant period.
20. The method as claimed in claim 19 , wherein the first minimum resonant period is decreased in response to the decrease of the output load.
21. The method as claimed in claim 20 , wherein the first minimum resonant period includes a first minimum resonant sub-period having a fixed period and a second minimum resonant sub-period having an adjustable period, wherein the adjustable period is decreased in response to the decrease of the output load.
22. The method as claimed in claim 19 , wherein the second minimum resonant period is a fixed value.