IP Library › Granted Patent US 12,743,645
Granted Patent B2
US 12,743,645 · App. 18/300,838 · Granted Sep 22, 2026

Method and apparatus for generating Grover oracle quantum circuit, and Grover oracle quantum circuit using the same

Inventor: You-Seok Lee (Daejeon, KR)
Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
G06N10/20G06N10/80
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Quick Facts
Patent No.
US 12,743,645
App. No.
18/300,838
Granted
Sep 22, 2026
Kind
B2
Abstract

Disclosed herein are a method and apparatus for generating a Grover oracle quantum circuit, and the Grover oracle quantum circuit using the same. The method may include analyzing data qubits and sub-qubits used for a design of an analysis target cipher quantum circuit configured to implement an analysis target cipher based on the analysis target cipher quantum circuit, generating a dagger quantum circuit based on the analysis target cipher quantum circuit, generating a phase inversion quantum circuit configured to invert a phase of a target qubit by comparing output qubits of the analysis target cipher quantum circuit with a preset comparison target value, configuring a Grover oracle using the analysis target cipher quantum circuit, the dagger quantum circuit, and the phase inversion quantum circuit, allocating the data qubits and the sub-qubits, and generating a Grover oracle quantum circuit based on allocation information of the data qubits and the sub-qubits.

Claims (38)

1 . A method for generating a Grover oracle quantum circuit, comprising:

providing an analysis target cipher quantum circuit configured to implement an analysis target cipher;

analyzing data qubits and sub-qubits used in the analysis target cipher quantum circuit;

generating a dagger quantum circuit by compiling the analysis target cipher quantum circuit to generate a Quantum Assembly Language (QASM) and arranging the QASM in reverse order;

generating a phase inversion quantum circuit configured to invert a phase of a target qubit when output qubits of the analysis target cipher quantum circuit match a preset comparison target value;

configuring a Grover oracle using the analysis target cipher quantum circuit, the dagger quantum circuit, and the phase inversion quantum circuit;

allocating the data qubits and the sub-qubits by designating a portion of a total qubit resource as the data qubits and a remaining portion as the sub-qubits; and

generating the Grover oracle quantum circuit based on information about the allocation of the data qubits and the sub-qubits.

2 . The method of claim 1 , wherein a total number of qubits required for configuring the analysis target cipher quantum circuit corresponds to a sum of a number of the data qubits and a number of the sub-qubits.

3 . The method of claim 1 , wherein data qubits and sub-qubits of the dagger quantum circuit have sizes identical to the data qubits and the sub-qubits of the analysis target cipher quantum circuit, respectively.

4 . The method of claim 1 , wherein the phase inversion quantum circuit is configured to invert the phase of the target qubit in response to the output qubits of the analysis target cipher quantum circuit matching the preset comparison target value.

5 . The method of claim 1 , wherein the phase inversion quantum circuit comprises at least one of a multiple-controlled Toffoli gate having multiple-controlled qubits, or a Pauli-X gate, or a combination thereof.

6 . The method of claim 5 , wherein the multiple-controlled Toffoli gate is configured using a plurality of Toffoli gates.

7 . The method of claim 6 , wherein output qubits of the phase inversion quantum circuit are connected to control qubits of the multiple-controlled Toffoli gate, and wherein a number of the control qubits is identical to a number of the output qubits of the phase inversion quantum circuit.

8 . An apparatus for generating a Grover oracle quantum circuit, comprising:

a memory configured to store a control program for generating the Grover oracle quantum circuit; and

a processor configured to execute the control program stored in the memory,

wherein the processor is configured to:

provide an analysis target cipher quantum circuit configured to implement an analysis target cipher;

analyze data qubits and sub-qubits used in the analysis target cipher quantum circuit;

generate a dagger quantum circuit by compiling the analysis target cipher quantum circuit to generate a Quantum Assembly Language (QASM) and arranging the QASM in reverse order;

generate a phase inversion quantum circuit configured to invert a phase of a target qubit when output qubits of the analysis target cipher quantum circuit match a preset comparison target value;

configure a Grover oracle using the analysis target cipher quantum circuit, the dagger quantum circuit, and the phase inversion quantum circuit;

allocate the data qubits and the sub-qubits by designating a portion of a total qubit resource as the data qubits and a remaining portion as the sub-qubits; and

generate the Grover oracle quantum circuit based on information about the allocation of the data qubits and the sub-qubits.

9 . The apparatus of claim 8 , wherein the processor is configured to determine a total number of qubits required for configuring the analysis target cipher quantum circuit as a sum of a number of the data qubits and a number of the sub-qubits.

10 . The apparatus of claim 8 , wherein the data qubits and the sub-qubits of the dagger quantum circuit have sizes identical to the data qubits and the sub-qubits of the analysis target cipher quantum circuit, respectively.

11 . The apparatus of claim 8 , wherein the processor is configured to control the phase inversion quantum circuit to invert the phase of the target qubit in response to the output qubits of the analysis target cipher quantum circuit matching the preset comparison target value.

12 . The apparatus of claim 8 , wherein the phase inversion quantum circuit comprises at least one of a multiple-controlled Toffoli gate having multiple-controlled qubits, or a Pauli-X gate, or a combination thereof.

13 . The apparatus of claim 12 , wherein the processor is configured to configure the multiple-controlled Toffoli gate using a plurality of Toffoli gates.

14 . The apparatus of claim 13 , wherein output qubits of the phase inversion quantum circuit are connected to control qubits of the multiple-controlled Toffoli gate, and wherein a number of the control qubits is identical to a number of the output qubits of the phase inversion quantum circuit.

15 . A Grover oracle quantum circuit, comprising:

an analysis target cipher quantum circuit configured to allocate an input value to one or more input qubits and an output value to one or more output qubits;

a phase inversion quantum circuit configured to receive the output value from the analysis target cipher quantum circuit, compare the output value with a preset comparison target value, and invert a phase of a target qubit when the output value matches the preset comparison target value; and

a dagger quantum circuit electrically connected to output qubits of the phase inversion quantum circuit and configured to invert values of the output qubits of the phase inversion quantum circuit to initial values,

wherein the dagger quantum circuit is generated by compiling the analysis target cipher quantum circuit to generate a Quantum Assembly Language (QASM) and arranging the QASM in reverse order.

16 . The Grover oracle quantum circuit of claim 15 , wherein a number of the output qubits of the analysis target cipher quantum circuit is identical to a number of control qubits within the phase inversion quantum circuit.

17 . The Grover oracle quantum circuit of claim 15 , wherein the phase inversion quantum circuit is configured to invert the phase of the target qubit in response to the output qubits of the analysis target cipher quantum circuit being identical to the preset comparison target value.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2023
From: LEE, YOU-SEOK
To: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
Reel/Frame 063344/0442 →
Priority Claims (1)
KR 10-2022-0108939 · Aug 30, 2022 · national
Continuity (1)
Related Publication 20240070505A1 · Feb 29, 2024
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