IP Library › Granted Patent US 12,411,513
Granted Patent B2
US 12,411,513 · App. 18/303,466 · Granted Sep 9, 2025

Integrated circuit and semiconductor module

Inventor: Masashi Akahane (Nagano, JP)
Assignee: FUJI ELECTRIC CO., LTD.
G05F3/30G05F1/59G05F3/26
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Quick Facts
Patent No.
US 12,411,513
App. No.
18/303,466
Granted
Sep 9, 2025
Kind
B2
Abstract

An integrated circuit includes: a power supply line configured to receive a power supply voltage; a constant current source electrically coupled to the power supply line; a reference voltage circuit electrically coupled to the constant current source; and a first resistor having two ends, one end thereof being electrically coupled to the constant current source, and the other end thereof being electrically coupled to the reference voltage circuit. The reference voltage circuit is a bandgap circuit including a plurality pf bipolar devices. The first resistor is configured to decrease a leakage current in the bipolar devices when a temperature thereof rises.

Claims (55)

1. An integrated circuit comprising:

a power supply line configured to receive a power supply voltage;

a constant current source electrically coupled to the power supply line;

a reference voltage circuit electrically coupled to the constant current source; and

a first resistor having two ends, one end thereof being electrically coupled to the constant current source, and the other end thereof being electrically coupled to the reference voltage circuit, wherein

the reference voltage circuit is a bandgap circuit including a plurality of bipolar devices, and

the first resistor is configured to decrease a leakage current in the plurality of bipolar devices when a temperature rises.

2. The integrated circuit according to claim 1 , wherein a current value of the constant current source is determined such that a current value of a current flowing from the reference voltage circuit to a ground is limited to a current value of the constant current source, when the temperature is equal to or higher than a predetermined temperature at which the leakage current is generated.

3. The integrated circuit according to claim 1 , wherein a current value of a first current, which is supplied to the reference voltage circuit by the constant current source when the temperature is a predetermined temperature, is smaller than a current value of a second current, which is supplied from the power supply line to the reference voltage circuit when the temperature is the predetermined temperature, in a state where the reference voltage circuit is coupled to the power supply line.

4. The integrated circuit according to claim 1 , wherein

the integrated circuit includes a bias current source, and

the constant current source includes

a first metal-oxide-semiconductor (MOS) transistor allowing a bias current of the bias current source to flow therethrough, and

a second MOS transistor configuring a current mirror circuit with the first MOS transistor, the second MOS transistor being configured to supply a constant current to the reference voltage circuit.

5. The integrated circuit according to claim 4 , wherein the bias current source includes

a second Zener diode, and

a third MOS transistor configured to generate the bias current, based on a voltage generated at the second Zener diode.

6. The integrated circuit according to claim 4 , wherein the bias current source includes a diode-coupled depletion type MOS transistor.

7. The integrated circuit according to claim 1 , wherein

the reference voltage circuit includes

a first current source configured to receive a current from the constant current source,

a second current source configured to receive the current from the constant current source, the second current source being electrically coupled in parallel with the first current source,

a first bipolar transistor electrically coupled in series to the first current source,

a second resistor electrically coupled in series to the second current source, and

a second bipolar transistor electrically coupled in series to the second resistor, and the reference voltage circuit is configured to output a voltage at the second resistor as a temperature-compensated reference voltage.

8. A semiconductor module, comprising the integrated circuit according to claim 1 .

9. An integrated circuit comprising:

a power supply line configured to receive a power supply voltage;

a constant current source electrically coupled to the power supply line;

a reference voltage circuit electrically coupled to the constant current source; and

a diode having

an anode electrically coupled to the constant current source, and

a cathode electrically coupled to the reference voltage circuit, wherein the integrated circuit includes a bias current source, and the constant current source includes

a single first metal-oxide-semiconductor (MOS) transistor allowing a bias current of the bias current source to flow therethrough, and

a single second MOS transistor configuring a current mirror circuit with the single first MOS transistor, the single second MOS transistor being configured to supply a constant current to the anode of the diode; and

the reference voltage circuit includes

a first current source configured to receive a current from the constant current source,

a second current source configured to receive the current from the constant current source, the second current source being electrically coupled in parallel with the first current source,

a first bipolar transistor electrically coupled in series to the first current source,

a second resistor electrically coupled in series to the second current source, and

a second bipolar transistor electrically coupled in series to the second resistor,

the reference voltage circuit being configured to output a voltage at the second resistor as a temperature-compensated reference voltage.

10. An integrated circuit comprising:

a power supply line configured to receive a power supply voltage;

a constant current source electrically coupled to the power supply line; and

a reference voltage circuit and a first Zener diode connected in parallel, both being electrically coupled between the constant current source and a ground, wherein

the first Zener diode has

a cathode electrically coupled to the reference voltage circuit and the constant current source, and

an anode that is grounded, such that a Zener voltage of the first Zener diode is supplied directly to the reference voltage circuit as a voltage to operate the reference voltage circuit, and

the reference voltage circuit is a bandgap circuit including a plurality of bipolar devices, the reference voltage circuit generating a reference voltage based on the Zener voltage.

11. The integrated circuit of claim 10 , further comprising:

a bias current source, wherein

the constant current source includes

a first metal-oxide-semiconductor (MOS) transistor allowing a bias current of the bias current source to flow therethrough, and

a second MOS transistor configuring a current mirror circuit with the first MOS transistor, the second MOS transistor being configured to supply a constant current to the reference voltage circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2023
From: AKAHANE, MASASHI
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 063382/0546 →
Priority Claims (1)
JP 2021-082486 · May 14, 2021 · national
Continuity (2)
Continuation PCTJP2022016144 · Mar 30, 2022
Related Publication 20230266784A1 · Aug 24, 2023
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