IP Library Granted Patent US 12,086,367
Granted Patent B2
US 12,086,367 · App. 18/303,770 · Granted Sep 10, 2024

Display panel and display device including the same

Inventors: Seung Lyong Bok (Hwaseong-si, KR); Ki Seo Kim (Yongin-si, KR); Jae Kyoung Kim (Hwaseong-si, KR); Young Seok Seo (Seoul, KR); Sun Mi Yu (Seoul, KR); Jin Oh Kwag (Yongin-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
G06F3/0443G06F3/0414G09G3/3225H01Q1/38H10K59/131H10K59/40G06F2203/04102
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Quick Facts
Patent No.
US 12,086,367
App. No.
18/303,770
Granted
Sep 10, 2024
Kind
B2
Abstract

A display device includes a display panel including a display layer having light-emitting elements on the substrate, and a sensor electrode layer on the display layer. The sensor electrode layer includes sensor electrodes in a sensor area, sensor lines electrically connected to the sensor electrodes and a first conductive pattern spaced apart from the sensor lines and sensor electrodes. The sensor lines and the first conductive pattern are in a sensor peripheral area adjacent to the sensor area. The first conductive pattern is an antenna.

Claims (77)

1. A display panel comprising:

a pixel unit comprising a plurality of sub-pixels disposed on a substrate;

a transmissive portion disposed on a side of the pixel unit; and

a first conductive pattern disposed in the transmissive portion,

wherein the first conductive pattern is an antenna.

2. The display panel of claim 1 , further comprising:

a second conductive pattern disposed in the transmissive portion, the second conductive pattern overlapping the first conductive pattern in a thickness direction of the substrate, and receiving a ground voltage or supply voltage.

3. The display panel of claim 2 , wherein each of the plurality of sub-pixels comprises:

a thin-film transistor including:

an active layer disposed on the substrate;

a gate electrode disposed on a gate insulating layer disposed on at least a part of the active layer; and

a source electrode and a drain electrode disposed on an interlayer dielectric layer disposed on the gate electrode; and

a light-emitting element including:

a first electrode disposed on a planarization layer disposed on the source electrode and the drain electrode;

an emissive layer disposed on the first electrode; and

a second electrode disposed on the emissive layer.

4. The display panel of claim 3 , wherein

the first conductive pattern and the first electrode are disposed on a same layer, and

the second conductive pattern and the source electrode and the drain electrode are disposed on a same layer.

5. The display panel of claim 3 , further comprising:

a mirror area disposed on another side of the pixel unit; and

a mirror pattern disposed in the mirror area.

6. The display panel of claim 5 , wherein the mirror pattern and the first conductive pattern are disposed on a same layer.

7. The display panel of claim 5 , wherein the mirror pattern and the first electrode are disposed on a same layer.

8. The display panel of claim 3 , wherein

each of the plurality of sub-pixels comprises a capacitor electrode disposed on a first insulating layer disposed on the gate electrode, and

the source electrode and the drain electrode disposed on a second insulating layer are disposed on the capacitor electrode.

9. The display panel of claim 8 , wherein

the first conductive pattern and the source electrode and the drain electrode are disposed on a same layer, and

the second conductive pattern and the capacitor electrode are disposed on a same layer.

10. The display panel of claim 8 , wherein

the first conductive pattern and the capacitor electrode are disposed on a same layer, and

the second conductive pattern and the gate electrode are disposed on a same layer.

11. The display panel of claim 3 , wherein

each of the plurality of sub-pixels comprises a light-blocking layer disposed on the substrate, and

the active layer is disposed on a first buffer film disposed on the light-blocking layer.

12. The display panel of claim 11 , wherein

the first conductive pattern and the gate electrode are disposed on a same layer, and

the second conductive pattern and the light-blocking layer are disposed on a same layer.

13. The display panel of claim 11 , wherein

the first conductive pattern and the active layer are disposed on a same layer, and

the second conductive pattern and the light-blocking layer are disposed on a same layer.

14. The display panel of claim 11 , wherein

the first conductive pattern is disposed on a first surface of the substrate, and

the second conductive pattern is disposed on a second surface of the substrate opposite to the first surface of the substrate.

15. The display panel of claim 14 , wherein the first conductive pattern and the light-blocking layer are disposed on a same layer.

16. The display panel of claim 14 , wherein

the first buffer film is disposed on the first conductive pattern, and

a second buffer film is disposed on the second conductive pattern and the second surface of the substrate.

17. The display panel of claim 2 , wherein each of the plurality of sub-pixels comprises:

a first thin-film transistor including:

a first active layer disposed on the substrate;

a first gate electrode disposed on a first gate insulating layer disposed on at least a part of the first active layer; and

a first source electrode and a first drain electrode disposed on a first interlayer dielectric layer disposed on the first gate electrode;

a second thin-film transistor including:

a light-blocking layer disposed on the first interlayer dielectric layer;

a second active layer disposed on a second interlayer dielectric layer disposed the light-blocking layer;

a second gate electrode disposed on a second gate insulating layer disposed on at least a part of the second active layer; and

a second source electrode and a second drain electrode disposed on a third interlayer dielectric layer disposed on the second gate electrode; and

a light-emitting element including:

a first electrode disposed on a planarization layer disposed on the first source electrode, the second source electrode, the first drain electrode and the second drain electrode;

an emissive layer disposed on the first electrode; and

a second electrode disposed on the emissive layer.

18. The display panel of claim 17 , wherein

the first conductive pattern and the first electrode are disposed on a same layer, and

the second conductive pattern and the source electrode and the drain electrode are disposed on a same layer.

19. A display device comprising:

a display panel including a display area having a main area and a sub-area; and

a sensor device, wherein

the display panel includes:

a pixel unit comprising a plurality of sub-pixels disposed on a substrate;

a transmissive portion disposed on a side of the pixel unit; and

a first conductive pattern disposed in the transmissive portion,

the first conductive pattern is an antenna, and

the sensor device overlaps the transmissive portion of the sub-area.

20. The display device of claim 19 , further comprising:

a second conductive pattern disposed in the transmissive portion, the second conductive pattern overlapping the first conductive pattern in a thickness direction of the substrate, and receiving a ground voltage or supply voltage.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2023
From: BOK, SEUNG LYONG; KIM, KI SEO; KIM, JAE KYOUNG; SEO, YOUNG SEOK; YU, SUN MI; KWAG, JIN OH
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 063402/0828 →
Priority Claims (2)
KR 10-2019-0069831 · Jun 13, 2019 · national
KR 10-2019-0092018 · Jul 29, 2019 · national
Continuity (3)
Division 17682494 · Feb 28, 2022
Division 16884844 · May 27, 2020
Related Publication 20230266850A1 · Aug 24, 2023