Pin-level encryption for electrical systems
A system and method of providing pin-level encryption to low-information signals is provided. The system comprises a first system communicatively coupled to a second system. The first system comprises a signal generator configured to generate a signal having a complexity and a mixer circuit configured to receive a key, create a secured message by applying the key to the signal, and transmit the secured message to the second system. The secured message has a complexity that is higher than the complexity of the signal.
1 . A system comprising:
a first system communicatively coupled to a second system, the first system comprising a signal generator configured to generate a signal;
a mixer circuit tapped to an output pin of the first system, the mixer circuit configured to receive a key from an emanator circuit and the signal from the signal generator of the first system, create a secured message by applying the key to the signal, and transmit the secured message to the second system; and
the emanator circuit communicatively coupled to the first system and the second system and configured to generate and provide the key to the first system and the second system;
wherein the emanator circuit is configured to generate the key such that at least one of:
the key is longer than an underlying message of the signal, or
the key contains a higher amount of information than the underlying message of the signal, wherein the higher amount of information contained by the key obfuscates the underlying message of the signal.
2 . The system of claim 1 , wherein the emanator circuit is configured to generate and provide a new key to the first system and the second system for each subsequent signal from the signal generator such that the new keys are longer than the underlying messages of their corresponding subsequent signals.
3 . The system of claim 1 , wherein the first system comprises a hardware root of trust.
4 . The system of claim 1 , wherein the first system further comprises an antenna, and wherein the first system is configured to receive the key from the emanator circuit over a wireless connection.
5 . The system of claim 1 , wherein the emanator circuit and the second system are connected over a wired connection, and the second system is configured to receive the key over the wired connection.
6 . The system of claim 5 , wherein the second system is configured to extract the signal from the secured message using the key received from the emanator circuit.
7 . The system of claim 1 , wherein the first system is an embedded system, the second system is an embedded system, or a combination of both.
8 . The system of claim 1 , wherein the mixer circuit comprises a set of non-transitory machine-readable instructions executable by one or more processors.
9 . The system of claim 1 , wherein the signal comprises a single bit digital signal.
10 . The system of claim 1 , wherein the signal comprises a digital signal, and the first system further comprising a DAC device configured to convert the digital signal into an analog signal.
11 . The system of claim 10 , wherein the mixer circuit comprises an analog mixer circuit, and applying the key comprises mixing the analog signal with the key.
12 . A method comprising:
generating, by a first system, a first signal;
applying, by a mixer circuit tapped to an output pin of the first system, a first key to the first signal to generate a first secured message; and
transmitting, by the mixer circuit, the first secured message to a second system;
wherein the first key is generated such that at least one of:
the first key is longer than an underlying message of the first signal, or
the first key contains a higher amount of information than the underlying message of the first signal, wherein the higher amount of information contained by the first key obfuscates the underlying message of the first signal.
13 . The method of claim 12 , further comprising:
generating, by the first system, a second signal, the second signal and the first signal comprising the same data; and
applying, by the mixer circuit, a second key to the second signal to generate a second secured message,
wherein the first key is different from the second key such that the second secured message is different from the first secured message.
14 . The method of claim 12 , further comprising: decrypting, by the second system, the first secured message using the first key.
15 . The method of claim 12 , further comprising receiving, by the mixer circuit, the first key from an emanator, the emanator configured to transmit the first key once.
16 . A system, comprising:
a signal generator configured to generate a signal;
an integrated circuit communicatively coupled to the signal generator, the integrated circuit configured to process the signal generated by the signal generator; and
a mixer circuit tapped to an output pin of the integrated circuit and configured to receive a key and create a secured message by applying the key to the processed signal,
wherein the key is generated such that at least one of:
the key is longer than an underlying message of the signal, or
the key contains a higher amount of information than an underlying message of the processed signal, wherein the higher amount of information contained by the key obfuscates the underlying message of the signal.
17 . The system of claim 1 , wherein the emanator circuit is configured to generate the key such that:
the key is longer than the underlying message of the signal, and
the key contains a higher amount of information than the underlying message of the signal.
18 . The method of claim 12 , wherein the first key is longer than the underlying message of the first signal.
19 . The system of claim 16 , wherein the key is longer than the underlying message of the processed signal.