Operating an analog-to-digital converter device
There is described an analog-to-digital converter, ADC, device ( 100 ), comprising: i) a first converter stage ( 110 ), comprising a first digital-to-analog converter, DAC, ( 115 ), comprising at least two first unit elements ( 116, 117, 118 ) each with a first unit element value (U 11 , U 12 , U 13 ); ii) a second converter stage ( 120 ), comprising a second DAC ( 125 ), comprising at least two second unit elements each with a second unit element value (U 21 , U 22 , U 23 ); and iii) a control device ( 180 ), coupled to the first DAC ( 115 ) and the second DAC and configured to: swap at least one of the first unit element values (U 1 ) with at least one of the second unit element values (U 2 ) to obtain corresponding third unit element values (U 3 ) and forth unit element values (U 4 ).
1. An analog-to-digital converter, ADC, device, comprising:
a first converter stage, comprising
a first digital-to-analog converter, DAC, comprising at least two first unit elements each with a first unit element value; and
a second converter stage, comprising
a second DAC, comprising at least two second unit elements each with a second unit element value;
a control device, coupled to the first DAC and the second DAC and configured to:
swap at least one of the first unit element values with at least one of the second unit element values to obtain corresponding third unit element values and forth unit element values.
2. The ADC device according to claim 1 , wherein the control device is configured to perform the swap randomly.
3. The ADC device according to claim 1 , wherein the control device is configured to randomly shuffle the first unit element values and the second unit element values with each other.
4. The ADC device according to claim 1 ,
wherein the control device is configured to at least one of:
generate a first DAC output for the first DAC by selecting the third unit element values;
generate a second DAC output for the second DAC by selecting the fourth unit element values.
5. The ADC device according to claim 4 , wherein at least one of the selections is a random selection.
6. The ADC device according to claim 1 ,
wherein the ADC device comprises three or more converter stages with respective DACs, and
wherein the control device is configured to apply the swap to all unit element values of all DACs.
7. The ADC device according to claim 1 ,
wherein the ADC device comprises three of more converter stages with respective DACs, and
wherein the control device is configured to apply the swap only to the unit element values of those DACs, where the respective converter stage is arranged in an upstream region of the ADC device.
8. The ADC device according to any one of the preceding claims claim 1 ,
wherein the control device is configured to generate at least one of a first DAC output for the first DAC by randomly selecting the unit element values, after the swap;
a second DAC output for the second DAC by randomly selecting the unit element values after the swap.
9. The ADC device ( 100 ) according to claim 1 ,
wherein the control device is configured to process the first unit element values and the second unit element values in form of an array.
10. The ADC device according to claim 9 ,
wherein the control device is configured to at least one of:
swap randomly the rows or lines of the array;
randomly shuffle all values of the array.
11. The ADC device according to claim 9 , wherein the control device is configured to generate the first or second DAC output by randomly selecting unit element values from at least one of
the whole array;
the first or second row or line.
12. The ADC device according to claim 1 ,
wherein the swap comprises a dynamic element matching, DEM, technique.
13. The ADC device according to claim 1 ,
wherein the ADC is configured as a continuous time pipeline ADC.
14. A method of operating an ADC device having a first digital-to-analog converter, DAC, in a first converter stage, the first DAC comprising at least two first unit elements each with a first unit element value, and a second DAC in a second converter stage, the second DAC comprising at least two second unit elements each with a second unit element value, the method comprising:
providing the first unit element values and the second unit element values, and
swapping at least one of the first unit element values with at least one of the second unit element values to obtain corresponding third unit element values and forth unit element values.
15. The method according to claim 14 , further comprising using a swap of unit element values from different DACs to linearize the DACs and minimize the gain errors in the context of an ADC device.
16. The method according to claim 14 , further comprising randomly shuffling the first unit element values and the second unit element values with each other.
17. The method according to claim 14 , further comprising generating a first DAC output for the first DAC by selecting the third unit element values.
18. The method according to claim 14 , further comprising generating a second DAC output for the second DAC by selecting the fourth unit element values.
19. The method according to claim 14 , further comprising generating a first DAC output for the first DAC by randomly selecting the unit element values after the swapping.
20. The method according to claim 14 , further comprising generating a second DAC output for the second DAC by randomly selecting the unit element values after the swap.