IP Library › Granted Patent US 12,744,452
Granted Patent B2
US 12,744,452 · App. 18/325,226 · Granted Sep 22, 2026

Power converter compensation for ground bouncing

Inventors: Ting-Li Hsu (Munich, DE); Qiao Yang (Munich, DE); Stefan Herzer (Marzling, DE); Hans Schmeller (Freising, DE)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H02M1/14H02M1/0025H02M3/158
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Quick Facts
Patent No.
US 12,744,452
App. No.
18/325,226
Granted
Sep 22, 2026
Kind
B2
Abstract

An integrated circuit includes an error amplifier having a reference input, a feedback input, and an error output. A comparator has first and second comparator inputs and a comparator output. The first comparator input is coupled to the error output. A control circuit has a control input and a control output. The control input is coupled to the comparator output. The compensation circuit has a compensation control input and a compensation output. The compensation control input is coupled to the control output. The compensation output is coupled to at least one of the reference input, the feedback input, or the error output.

Claims (56)

1 . An integrated circuit (IC) comprising:

an error amplifier having a reference input, a feedback input, and an error output;

a comparator having first and second comparator inputs and a comparator output, the first comparator input coupled to the error output;

a control circuit having a control input and a control output, the control input coupled to the comparator output; and

a compensation circuit having a first compensation control input, a second compensation control input, and a compensation output, the first compensation control input coupled to the control output, and the compensation output coupled to at least one of the reference input, the feedback input, or the error output, the compensation circuit configurable to;

receive a switching signal provided by the control circuit at the first compensation control input;

receive, at the second compensation control input, a control signal indicating an amplitude of an error signal at the error output; and

provide a pulse signal to the at least one of the reference input, the feedback input, or the error output responsive to the switching signal, the pulse signal having a timing determined based on the switching signal and having an amplitude determined based on the control signal.

2 . The IC of claim 1 , wherein the comparator is part of a modulator circuit, and the modulator circuit includes a conversion circuit coupled between the second compensation control input and the error output.

3 . The IC of claim 1 , further comprising a switch having a control terminal coupled to the control output, and a switch terminal coupled to ground, wherein the compensation circuit is configurable to provide the pulse signal at the at least one of the reference input, the feedback input, or the error output responsive to the switching signal to at least partially compensate ground bouncing associated with switching the switch by the switching signal.

4 . The IC of claim 1 , wherein the compensation circuit has a bias terminal and includes:

a capacitor having first and second capacitor terminals, the first capacitor terminal coupled to the compensation output;

a first switch coupled between the second capacitor terminal and the bias terminal, the first switch having a first switch control terminal coupled to the first compensation control input; and

a second switch coupled between the second capacitor terminal and the second compensation control input, the second switch having a second switch control terminal coupled to the first compensation control input.

5 . The IC of claim 4 , wherein the bias terminal is coupled to a ground terminal or a voltage source circuit.

6 . The IC of claim 4 , wherein the capacitor is a first capacitor, and the compensation circuit includes a resistor and a second capacitor coupled between the second compensation control input and the bias terminal.

7 . The IC of claim 6 , further comprising:

a voltage-to-current converter circuit having a converter input and a converter output, the converter input coupled to the error output; and

a current mirror having a current mirror input and a current mirror output, the current mirror input coupled to the converter output, and the current mirror output coupled to the resistor and the second capacitor.

8 . The IC of claim 7 , wherein the current mirror includes a diode-connected transistor coupled to the converter output, the diode-connected transistor having a control terminal,

wherein the control terminal of the diode-connected transistor is coupled to the first comparator input, and the second comparator input is coupled to a current sense terminal.

9 . The IC of claim 1 , further comprising a sawtooth signal generator having an output coupled to the second comparator input.

10 . A system comprising:

an integrated circuit (IC) having a first ground terminal, an input voltage terminal, a switching terminal, and a feedback terminal, and the IC including:

a high side transistor coupled between the input voltage terminal and the switching terminal, the high side transistor having a first transistor control terminal;

a low side transistor coupled between the switching terminal and the first ground terminal, the low side transistor having a second transistor control terminal;

an error amplifier having a first input, a second input coupled to the feedback terminal, and an error output;

a comparator having first and second comparator inputs and a comparator output, the first comparator input coupled to the error output;

a control circuit having a control input and a control output, the control input coupled to the comparator output; and

a compensation circuit having a first compensation control input, a second compensation control input, and a compensation output, the first compensation control input coupled to the control output, and the compensation output coupled to at least one of the first input, the second input, or the error output, the compensation circuit configurable to;

receive switching signals provided by the control circuit at the first compensation control input;

receive, at the second compensation control input, a control signal indicating an amplitude of an error signal at the error output; and

provide a pulse signal to the at least one of the first input, the second input, or the error output responsive to the switching signal, the pulse signal having a timing determined based on the switching signals and having an amplitude determined based on the control signal;

an inductor coupled between the switching terminal and a power output; and

a feedback resistor network coupled between the power output and a second ground terminal, the feedback resistor network having a feedback output coupled to the feedback terminal.

11 . The system of claim 10 , wherein the comparator is part of a modulator circuit, and the modulator circuit includes a conversion circuit coupled between the second compensation control input and the error output.

12 . The system of claim 10 , wherein the compensation circuit is configurable to provide the pulse signal at the at least one of the first input, the second input, or the error output responsive to the switching signal, to at least partially compensate voltage ripples at the first ground terminal and associated with switching the low side transistor by the switching signals.

13 . The system of claim 10 , wherein the compensation circuit has a bias terminal and includes:

a capacitor having first and second capacitor terminals, the first capacitor terminal coupled to the compensation output;

a first switch coupled between the second capacitor terminal and the bias terminal, the first switch having a first switch control terminal coupled to the first compensation control input; and

a second switch coupled between the second capacitor terminal and the second compensation control input, the second switch having a second switch control terminal coupled to the first compensation control input.

14 . The system of claim 13 , wherein the bias terminal is coupled to a ground terminal or a voltage source circuit.

15 . The system of claim 13 , wherein the capacitor is a first capacitor, and the compensation circuit includes a resistor and a second capacitor coupled between the second compensation control input and the bias terminal.

16 . The system of claim 10 , further comprising:

a voltage-to-current converter circuit having a converter input and a converter output, the converter input coupled to the error output; and

a current mirror having a current mirror input and a current mirror output, the current mirror input coupled to the converter output, and the current mirror output coupled to the second compensation control input.

17 . The system of claim 16 , wherein the current mirror comprises a diode-connected transistor coupled to the converter output, the diode-connected transistor having a control terminal,

wherein the control terminal of the diode-connected transistor is coupled to the first comparator input, and the second comparator input is coupled to a current sense terminal.

18 . The system of claim 10 , further comprising a sawtooth signal generator having an output coupled to the second comparator input.

19 . A method comprising:

receiving a switching control signal of a transistor;

generating a pulse signal responsive to receiving the switching control signal, wherein the pulse signal has an amplitude determined based on an amplitude of pulses at a ground terminal coupled to the transistor;

generating an error signal responsive to the pulse signal; and

responsive to the error signal exceeding a threshold, enabling the transistor.

20 . The method of claim 19 , wherein generating the error signal comprises: combining the pulse signal with a reference voltage to generate a compensated reference voltage, and generating the error signal based on a difference between the compensated reference voltage and a feedback voltage from a power converter including the transistor.

21 . The method of claim 19 , further comprising determining the amplitude of the pulses at the ground terminal coupled to the transistor based on at least one of: a first current that flows through the transistor when the transistor is enabled, a second current that flows through an inductor coupled to the transistor, or a third current indicating an amplitude of the error signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 30, 2023
From: HSU, TING-LI; YANG, QIAO; HERZER, STEFAN; SCHMELLER, HANS
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 063791/0440 →
Continuity (1)
Related Publication 20240405663A1 · Dec 5, 2024
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