IP Library › Granted Patent US 12,340,106
Granted Patent B2
US 12,340,106 · App. 18/344,545 · Granted Jun 24, 2025

Storage device for storing address information of target page with overwritten dummy data and operating method thereof

Inventors: Tae Yeon Hwang (Icheon-si, KR); Kyung Hoon Lee (Icheon, KR); Sung Hun Jeon (Icheon-si, KR)
Assignee: SK hynix Inc.
G06F3/064G06F3/0658G06F3/0619G06F3/0679
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Quick Facts
Patent No.
US 12,340,106
App. No.
18/344,545
Granted
Jun 24, 2025
Kind
B2
Abstract

A storage device may search for a target page among pages included in a first memory block of a plurality of memory blocks each including a plurality of pages, and when an uncorrectable error occurs while reading data stored in the target page, may overwrite dummy data into the target page and then store address information indicating a location of the target page in a second memory block among the plurality of memory blocks.

Claims (33)

1. An operating method of a storage device, the method comprising:

searching for a target page among pages included in a first memory block among a plurality of memory blocks each of which includes a plurality of pages;

reading data stored in the target page;

after detecting an uncorrectable error while reading data stored in the target page, overwriting dummy data into the target page to change the distribution of threshold voltages of memory cells corresponding to the target page and to prevent the uncertain determination of the normal state or abnormal state of the state of the target page, and

storing address information indicating a location of the target page in a second memory block among the plurality of memory blocks.

2. The operating method of claim 1 , wherein the searching for a target page is performed during a sudden power-off recovery (SPOR) operation.

3. The operating method of claim 1 , wherein the target page is a page in which data is programmed last among pages included in the first memory block.

4. The operating method of claim 1 , wherein the second memory block is a meta data block in which meta data is stored.

5. The operating method of claim 1 , further comprising performing an operation of updating a mapping table based on data stored in pages included in the first memory block.

6. The operating method of claim 5 , wherein the operation of updating the mapping table comprises:

determining whether the address information is stored in the second memory block;

not reading the data of the target page when the address information is determined to be stored in the second memory block, and

reading data of the target page when the address information is determined to not be stored in the second memory block.

7. A storage device comprising:

a memory including a plurality of memory blocks each of which includes a plurality of pages; and

a controller configured to:

search for a target page among pages included in a first memory block of the plurality of memory blocks, and

after detecting an uncorrectable error while reading data stored in the target page, overwrite dummy data into the target page to change the distribution of threshold voltages of memory cells corresponding to the target page and to prevent the uncertain determination of the normal state or abnormal state of the state of the target page and store address information indicating a location of the target page in a second memory block among the plurality of memory blocks.

8. The storage device of claim 7 , wherein the search for the target page is performed during a sudden power-off recovery (SPOR) operation.

9. The storage device of claim 7 , wherein the target page is a page in which data was programmed last among pages included in the first memory block.

10. The storage device of claim 7 , wherein each of bytes included in the dummy data is set to a preset pattern value.

11. The storage device of claim 7 , wherein the second memory block is a meta data block in which meta data is stored.

12. The storage device of claim 7 , wherein the address information comprises at least one of channel information for the first memory block, way information for the first memory block, an offset for the first memory block, or an offset for the target page.

13. The storage device of claim 7 , wherein the controller performs an operation of updating a mapping table based on data stored in pages included in the first memory block.

14. The storage device of claim 13 , wherein the controller is further configured to:

determine whether the address information is stored in the second memory block,

not read the data of the target page when the address information is determined to be stored in the second memory block, and

read the data of the target page when the address information is determined to not be stored in the second memory block.

15. A controller comprising:

a memory interface configured to communicate with a memory including a plurality of memory blocks each of which includes a plurality of pages; and

a control circuit configured to:

search for a target page, which is a page in which data is programmed last, among pages included in a first memory block of the plurality of memory blocks during a boot-up operation after a sudden power-off (SPO), and

after detecting an uncorrectable error while reading data stored in the target page, overwrite dummy data into the target page to change the distribution of threshold voltages of memory cells corresponding to the target page and to prevent the uncertain determination of the normal state or abnormal state of the state of the target page and store a location of the target page in a second memory block of the plurality of memory blocks.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2023
From: HWANG, TAE YEON; LEE, KYUNG HOON; JEON, SUNG HUN
To: SK HYNIX INC.
Reel/Frame 064128/0097 →
Priority Claims (1)
KR 10-2023-0028862 · Mar 6, 2023 · national
Continuity (1)
Related Publication 20240302981A1 · Sep 12, 2024
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