IP Library Granted Patent US 12,535,529
Granted Patent B2
US 12,535,529 · App. 18/348,433 · Granted Jan 27, 2026

Method and system for a battery monitoring circuit

Inventors: Sayan Acharya (Niskayuna, NY); Cong Li (Clifton Park, NY); Satish Prabhakaran (Albany, NY); Frank J. Mueller (Glenville, NY); Ahmed Elasser (Latham, NY)
Assignee: GE Aviation Systems LLC
G01R31/389G01R31/3835
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Quick Facts
Patent No.
US 12,535,529
App. No.
18/348,433
Granted
Jan 27, 2026
Kind
B2
Abstract

A method and system for determining the health of a set of batteries through the use of a battery monitoring circuit. The battery monitoring circuit including a first current loop and a second current loop. The first current loop being enabled by a first switch, a first resistor and a second switch. The second current loop being enabled by the first switch, a third switch, a voltage sensor, and the second switch.

Claims (44)

1 . A method of monitoring a set of batteries through a battery monitoring circuit electrically couplable to the set of batteries, the method comprising:

closing, at a first time, a first switch and a second switch, enabling a first current loop defined by at least the first switch, a first resistor, a first capacitor, and the second switch in series, the first current loop defining a first current suppliable from the set of batteries;

closing, at a second time after the first time, a third switch, enabling a second current loop defined by the third switch and an impedance analyzer in series with the third switch, the second current loop being in parallel with the first resistor, wherein the second current loop defines a second current, less than the first current;

measuring, by the impedance analyzer, a voltage experienced at the impedance analyzer based on the second current; and

determining, by the measured voltage, an impedance of the set of batteries.

2 . The method of claim 1 , further comprising closing, at the first time, the first switch and the second switch enabling the first current loop defined by the first switch, the first capacitor, the first resistor, a second capacitor, and the second switch in sequential serial arrangement.

3 . The method of claim 2 , further comprising closing, at the first time, the first switch and the second switch, enabling a third current loop defined by the first switch, the first capacitor, a second resistor, the second capacitor, and the second switch in sequential serial arrangement, with the third current loop being in parallel with and upstream of the first current loop.

4 . The method of claim 3 , further comprising rating the first resistor with a lower resistance than a resistance of the second resistor.

5 . The method of claim 3 , further comprising closing, at the first time, the first switch and the second switch, enabling a fourth current loop defined by the first switch, a third resistor, and the second switch in sequential serial arrangement, with the fourth current loop being in parallel with and upstream of the first current loop and the third current loop.

6 . The method of claim 5 , further comprising rating the first resistor with a lower resistance than a resistance of the second resistor and a resistance of the third resistor.

7 . The method of claim 5 , further comprising providing the fourth current loop upstream of the first capacitor and downstream of the second capacitor.

8 . The method of claim 1 , further comprising providing a transient voltage suppressor along the second current loop in parallel with the impedance analyzer.

9 . The method of claim 1 , further comprising opening, prior to closing the first switch and the second switch, the third switch.

10 . The method of claim 1 , further comprising closing, at the second time, the third switch and a fourth switch, enabling the second current loop defined by the third switch, the impedance analyzer, and the fourth switch in sequential serial arrangement.

11 . The method of claim 1 , further comprising determining, by the measured voltage and a controller module, the impedance.

12 . The method of claim 1 , further comprising providing the battery monitoring circuit onboard an aircraft or a turbine engine including the set of batteries.

13 . The method of claim 1 , further comprising closing, at the second time being greater than or equal to 0.5 seconds after and less than or equal to 1.5 seconds after the first time, the third switch.

14 . The method of claim 1 , further comprising estimating, via the impedance analyzer, the impedance of the set of batteries.

15 . The method of claim 1 , further comprising providing at least one of the first switch or the third switch as a semiconductor-based power switch.

16 . A battery monitoring circuit for monitoring a set of batteries electrically couplable to the battery monitoring circuit, the battery monitoring circuit comprising:

a first current loop having a first current suppliable from the set of batteries, the first current loop being defined by:

a first switch;

a first resistor,

a first capacitor; and

a second switch, with the first switch, the first resistor, the first capacitor and the second switch being in series;

a second current loop having a second current, less than the first current, the second current loop being in parallel with the first current loop and being defined by:

a third switch; and

a voltage sensor in series with the third switch; and

a controller module configured to:

close, at a first time, the first switch and the second switch, enabling the first current loop;

close, at a second time after the first time, the third switch, enabling the second current loop;

receive, from the voltage sensor, a value corresponding to a measured voltage at the voltage sensor; and

determine an impedance of the set of batteries based at least partially on the measured voltage.

17 . The battery monitoring circuit of claim 16 , wherein the first current loop further comprises:

the first capacitor downstream of the first switch and upstream of the first resistor; and

a second capacitor downstream of the first resistor and upstream of the second switch.

18 . The battery monitoring circuit of claim 17 , further comprising a third current loop defined by:

the first switch;

the first capacitor downstream of the first switch;

a second resistor downstream of the first capacitor;

the second capacitor downstream of the second resistor; and

the second switch.

19 . The battery monitoring circuit of claim 18 , wherein the first resistor has a lower resistance than a resistance of the second resistor.

20 . The battery monitoring circuit of claim 16 , wherein the voltage sensor is an impedance analyzer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2025
From: ACHARYA, SAYAN; LI, CONG; PRABHAKARAN, SATISH; MUELLER, FRANK J.; ELASSER, AHMED
To: GE AVIATION SYSTEMS LLC
Reel/Frame 072602/0730 →
Continuity (1)
Related Publication 20250012866A1 · Jan 9, 2025
References Cited (20)
US 7619390B2 · Kim · 2009 [cited by applicant]
US 7847557B2 · Yun et al. · 2010 [cited by applicant]
US 10288693B2 · Baker et al. · 2019 [cited by applicant]
US 11372054B2 · Marsili et al. · 2022 [cited by applicant]
US 20120126819A1 · Liu · 2012 [cited by applicant]
US 20160077160A1 · Wampler, II et al. · 2016 [cited by applicant]
US 20180067158A1 · Kawamura · 2018 [cited by examiner]
US 20200132781A1 · Marsili · 2020 [cited by examiner]
US 20200249281A1 · Ishii et al. · 2020 [cited by applicant]
US 20210109159A1 · Lammeren · 2021 [cited by applicant]
US 20210141023A1 · Gunji · 2021 [cited by applicant]
US 20210333329A1 · Li · 2021 [cited by applicant]
US 20210396815A1 · Bang · 2021 [cited by applicant]
US 20230204677A1 · Izutani · 2023 [cited by examiner]
EP 1088240B1 · 2006 [cited by applicant]
JP 2013228216A · 2013 [cited by applicant]
JP 2019117180A · 2019 [cited by applicant]
JP 2023058158A · 2023 [cited by applicant]
KR 20230067793A · 2023 [cited by applicant]
WO 2022062599A1 · 2022 [cited by applicant]