Three-dimensional integrated circuit
A 3-dimensional (3D) integrated circuit (IC) is provided. The 3D IC includes a plurality of chips, at least one through silicon via (TSV) structure, and a temperature sensor. The chips are stacked in the 3D IC. The TSV structure penetrates the chips. The temperature sensor is disposed in a first chip of the chips. The temperature sensor is disposed close to the TSV structure, and is configure to sense a temperature sensing result corresponding to a temperature of the TSV structure.
1 . A three-dimensional integrated circuit (3D IC), comprising:
a plurality of chips, the plurality of chips being stacked in the 3D IC;
at least one through silicon via (TSV) structure, penetrating the plurality of chips; and
a temperature sensor, disposed on a first chip of the plurality of chips, the temperature sensor being disposed close to the at least one TSV structure, and configured to sense a first temperature sensing result corresponding to a temperature of the at least one TSV structure,
wherein a thermal conductivity coefficient of the at least one TSV structure is greater than a thermal conductivity coefficient of a substrate of the plurality of chips.
2 . The 3D IC of claim 1 , further comprising:
a memory array, disposed on the first chip; and
a controller, coupled to the temperature sensor, and configured to increase a refresh frequency of the memory array when the first temperature sensing result shows that a temperature of the at least one TSV structure is greater than a temperature threshold.
3 . The 3D IC of claim 2 , wherein the temperature sensor is a first temperature sensor, the 3D IC further comprising:
a second temperature sensor, disposed close to the memory array, and configured to sense a second temperature sensing result corresponding to a temperature of the memory array.
4 . The 3D IC of claim 3 , wherein the controller increases the refresh frequency of the memory array when the second temperature sensing result shows that the temperature of the memory array is less than the temperature threshold.
5 . The 3D IC of claim 3 , wherein the controller increases the refresh frequency of the memory array when a temperature difference between the temperature of the memory array and the temperature threshold is less than a preset temperature range.
6 . The 3D IC of claim 3 , wherein the controller increases a refresh period of the memory array when the first temperature sensing result and the second temperature sensing result both show that the temperatures of the at least one TSV structure and the memory array are less than the temperature threshold.
7 . The 3D IC of claim 1 , wherein the temperature sensor is disconnected from the at least one TSV structure.
8 . The 3D IC of claim 1 , further comprising:
a first wire, coupled to the at least one TSV structure, and disposed on the first chip; and
a second wire, coupled to the temperature sensor, and disposed on the first chip,
wherein the first wire and the second wire both disposed spirally around using the temperature sensor as a center.
9 . The 3D IC of claim 8 , wherein the first wire and the second wire are disposed on the first chip in a manner of interlacing and spirally around the temperature sensor.
10 . The 3D IC of claim 8 , wherein the first wire and the second wire are disposed on a same metal layer of the first chip.
11 . The 3D IC of claim 8 , wherein the second wire are utilized for providing transmissions of an input signal or a reference voltage for the temperature sensor.
12 . The 3D IC of claim 8 , wherein the first wire and the second wire are disposed on different metal layers of the first chip.
13 . The 3D IC of claim 1 , wherein the at least one TSV structure is redundant.