IP Library Granted Patent US 12,380,836
Granted Patent B2
US 12,380,836 · App. 18/353,888 · Granted Aug 5, 2025

Display device

Inventors: Masanobu Ikeda (Tokyo, JP); Yoshinori Aoki (Tokyo, JP)
Assignee: MAGNOLIA WHITE CORPORATION
G09G3/32G09G3/204G09G3/2074G09G3/2077G09G2300/0443G09G2300/0452G09G2360/144G09G2360/16
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Quick Facts
Patent No.
US 12,380,836
App. No.
18/353,888
Granted
Aug 5, 2025
Kind
B2
Abstract

A display device includes a display area including a plurality of pixels, and a gradation control circuit configured to control a gradation of the pixel based on a gradation control mode. Each of the plurality of pixels includes first and second LED chips. One frame period of the gradation control mode includes a first to third subframe periods. In the first subframe period, the gradation of the pixel is controlled by a light emitting area of each of the first and second LED chips. In the second subframe period, the gradation of the pixel is controlled by a light emission time of each of the first and second LED chips. In the third subframe period, the gradation of the pixel is controlled by a current value supplied to each of the first and second LED chips.

Claims (26)

1. A display device comprising:

a display area comprising a pixel;

an illuminance detection portion configured to detect an illuminance value of an external light; and

a gradation control circuit configured to select one of a first gradation control mode, a second gradation control mode, and a third gradation control mode based on the illuminance value,

wherein the pixel comprises a first LED chip and a second LED chip,

one frame period of the first gradation control mode comprises a first subframe period and a second subframe period,

one frame period of the second gradation control mode comprises a third subframe period, a fourth subframe period, and a fifth subframe period,

one frame period of the third gradation control mode comprises a sixth subframe period, a seventh subframe period, and an eighth subframe period,

a gradation of the pixel is controlled by a light emitting area of each of the first LED chip and the second LED chip in the first subframe period, the third subframe period, and the sixth subframe period,

the gradation of the pixel is controlled by a light emission time of each of the first LED chip and the second LED chip in the second subframe period, the fourth subframe period, and the seventh subframe period, and

the gradation of the pixel is controlled by a current value supplied to each of the first LED chip and the second LED chip in the fifth subframe period and the eighth subframe period.

2. The display device according to claim 1 , wherein the first gradation control mode is selected when the illuminance value is less than or equal to a first value.

3. The display device according to claim 2 , wherein the first value is 500 lux.

4. The display device according to claim 2 , wherein the second gradation control mode is selected when the illuminance value is greater than the first value and less than or equal to a second value.

5. The display device according to claim 4 , wherein the second value is 5000 lux.

6. The display device according to claim 4 , wherein the third gradation control mode is selected when the illuminance value is greater than the second value.

7. The display device according to claim 1 , wherein a number of graduations controlled in the fourth subframe period is greater than a number of graduations controlled in the fifth subframe period.

8. The display device according to claim 1 , wherein a number of graduations controlled in the eighth subframe period is greater than a number of graduations controlled in the fifth subframe period.

9. The display device according to claim 1 , wherein the graduation control circuit selects one of the first gradation control mode, the second gradation control mode, and the third gradation control mode based on an average illuminance value obtained by averaging the illuminance values in first to n-th frames (n is an integer greater than or equal to 2).

10. The display device according to claim 1 , wherein the first LED chip and the second LED chip are identical.

11. The display device according to claim 10 ,

wherein a number of graduations controlled in each of the first subframe period, the third subframe period, and the sixth subframe period is 2 bits,

the graduation of the pixel by one of the 2 bits is controlled by light emission or non-light emission of the first LED chip, and

the graduation of the pixel by the other of the 2 bits is controlled by light emission or non-light emission of the second LED chip.

12. The display device according to claim 1 , wherein the first LED chip and the second LED chip have different sizes.

13. The display device according to claim 1 , wherein the first LED chip and the second LED chip have different light emitting areas.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 3, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 071599/0406 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2023
From: IKEDA, MASANOBU; AOKI, YOSHINORI
To: JAPAN DISPLAY INC.
Reel/Frame 064291/0379 →
Priority Claims (1)
JP 2021-016809 · Feb 4, 2021 · national
Continuity (2)
Continuation PCTJP2021045002 · Dec 7, 2021
Related Publication 20230360594A1 · Nov 9, 2023
References Cited (4)
US 20070279344A1 · Kimura · 2007 [cited by examiner]
US 20190129209A1 · Kobayashi · 2019 [cited by examiner]
US 20200111403A1 · Kim et al. · 2020 [cited by applicant]
International Search Report and Written Opinion mailed on Feb. 15, 2022, received for PCT Application PCT/JP2021/045002, filed on Dec. 7, 2021, 8 pages including English Translation. [cited by applicant]