Buffer-capacity, network-capacity and routing based circuits for load-balanced fine-grained adaptive routing in high-performance system interconnect

1. A switch for routing packets in an interconnection network, the switch comprising:

a plurality of egress ports to transmit packets;

one or more ingress ports to receive packets;

a port and bandwidth capacity circuit configured to obtain (i) port capacity for a plurality of egress ports of the switch, and (ii) bandwidth capacity for transmitting packets to a destination, wherein the bandwidth capacity includes buffer capacity corresponding to idle buffers in a path to the destination via an intermediate switch;

a network capacity circuit configured to compute a network capacity for transmitting packets to the destination, via a port, using a low-pass filter, based on a function of the port capacity and the buffer capacity; and

a routing circuit configured to route one or more packets received via one or more ingress ports of the switch, to the destination, based on the network capacity.

2. The switch of claim 1 , wherein the port capacity comprises available buffer capacity for ingress ports of respective receiver switches coupled to the plurality of egress ports.

3. The switch of claim 1 , wherein the port capacity is zero through any egress port that has a fault.

4. The switch of claim 1 , wherein the bandwidth capacity comprises idle buffer in a next switch.

5. The switch of claim 1 , wherein the bandwidth capacity comprises configured buffer minus current buffer in a next switch.

6. The switch of claim 1 , wherein the bandwidth capacity is calculated based on one or more telemetry packets received from another switch of the interconnection network.

7. The switch of claim 1 , wherein the function comprises Exponential Weighted Moving Average.

8. The switch of claim 1 , wherein the function comprises a plurality of low-pass filters.

9. The switch of claim 8 , wherein each low-pass filter is configured to combine the port capacity for a respective egress port with the bandwidth capacity, to obtain a respective bandwidth capacity for transmitting packets to the destination via the respective egress port.

10. The switch of claim 1 , wherein:

the switch is connected to a next switch using a plurality of virtual lanes;

the bandwidth capacity includes a respective buffer capacity for each virtual lane;

the network capacity circuit is configured to compute, for each virtual lane, a respective virtual lane capacity, using a respective one or more low-pass filters, based on the port capacity and the respective buffer capacity; and

the routing circuit is configured to route the one or more packets to the destination by selecting a virtual lane from the plurality of virtual lanes based on the respective virtual lane capacity.

11. The switch of claim 1 , wherein the bandwidth capacity includes idle buffers in a path to the destination that includes an intermediate switch.

12. A switch for routing packets in an interconnection network, the switch comprising:

a plurality of egress ports to transmit packets;

one or more ingress ports to receive packets;

a port and bandwidth capacity circuit configured to obtain (i) port capacity for a plurality of egress ports of the switch, and (ii) bandwidth capacity for transmitting packets to a destination, wherein the bandwidth capacity includes buffer capacity for a virtual lane connecting the switch to a next switch;

a network capacity circuit configured to compute a virtual lane capacity for transmitting packets to the destination, via the virtual lane, using a low-pass filter, based on a function of the port capacity and the buffer capacity; and

a routing circuit configured to route one or more packets received via one or more ingress ports of the switch, to the destination, via the virtual lane, based on the network capacity.