IP Library › Granted Patent US 12,718,848
Granted Patent B2
US 12,718,848 · App. 18/366,885 · Granted Aug 25, 2026

Integrated circuit device, memory cell and method

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Quick Facts
Patent No.
US 12,718,848
App. No.
18/366,885
Filed
Aug 8, 2023
Granted
Aug 25, 2026
Kind
B2
Examiner
CHO, SUNG IL
Art Unit
2825
USPC
365/63
Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2023
From: CHUNG, YEN LIN; WU, WEI-CHENG; LI, PEI-YUAN; LIN, CHIEN-CHEN; CHOU, CHUN-TSE; HUANG, CHIEN HUI; TU, YUNG-NING; WU, SHANG LIN; CHUNG, CHIA-CHE; LIN, KAO-CHENG; HUNG, CHIA-CHI; CHAN, WEI MIN; CHEN, YEN-HUEI
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 064815/0743 →
Continuity (2)
Provisional Application 63490666 · Mar 16, 2023
Related Publication 20240312492A1 · Sep 19, 2024
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