Enhanced valley tracking with trim setting updates in a memory device
Control logic in a memory device receives a request to perform a read operation to read data from a memory array of a memory device, the request comprising an indication of a segment of the memory array where the data is stored, and performs a first coarse valley tracking calibration operation on the segment of the memory array. The control logic further configures a read voltage level and one or more parameters associated with the read operation based on a result of the first coarse valley tracking calibration operation and performs a second fine valley tracking calibration operation on the segment of the memory array using the configured read voltage level and the configured one or more parameters.
1 . A memory device comprising:
a memory array; and
control logic, operatively coupled with the memory array, to perform operations comprising:
receiving a request to perform a read operation to read data from the memory array, the request comprising an indication of a segment of the memory array where the data is stored;
performing a first coarse valley tracking calibration operation on the segment of the memory array, wherein performing the first coarse valley tracking calibration operation comprises performing a failed byte count read operation on the segment of the memory array to determine a failed byte count;
configuring a read voltage level and one or more parameters associated with the read operation based on a result of the first coarse valley tracking calibration operation, the result comprising the failed byte count; and
performing a second fine valley tracking calibration operation on the segment of the memory array using the configured read voltage level and the configured one or more parameters.
2 . The memory device of claim 1 , wherein performing the failed byte count read operation on the segment of the memory array comprises causing a failed byte count voltage strobe to be applied, for a set period of time, to a target wordline associated with the segment of the memory array.
3 . The memory device of claim 2 , wherein memory cells in the segment of the memory array are programmed to a number of program voltage levels to represent the data, and wherein a magnitude of the failed byte count voltage strobe targets a highest program voltage level of the number of program voltage levels.
4 . The memory device of claim 1 , wherein configuring the one or more parameters associated with the read operation comprises configuring a bitline voltage to be applied to a bitline of the memory array.
5 . The memory device of claim 2 , wherein configuring the one or more parameters associated with the read operation comprises configuring a pass voltage to be applied to one or more wordlines adjacent to the target wordline in the memory array.
6 . The memory device of claim 1 , wherein performing the second fine valley tracking calibration operation comprises performing a parallel auto-read calibration (pARC) operation on the segment of the memory array.
7 . The memory device of claim 1 , wherein the control logic is to perform operations further comprising:
performing the read operation on the segment of the memory array using the configured read voltage level and the configured one or more parameters.
8 . A method comprising:
receiving a request to perform a read operation to read data from a memory array of a memory device, the request comprising an indication of a segment of the memory array where the data is stored;
performing a first coarse valley tracking calibration operation on the segment of the memory array, wherein performing the first coarse valley tracking calibration operation comprises performing a failed byte count read operation on the segment of the memory array to determine a failed byte count;
configuring a read voltage level and one or more parameters associated with the read operation based on a result of the first coarse valley tracking calibration operation, the result comprising the failed byte count; and
performing a second fine valley tracking calibration operation on the segment of the memory array using the configured read voltage level and the configured one or more parameters.
9 . The method of claim 8 , wherein performing the failed byte count read operation on the segment of the memory array comprises causing a failed byte count voltage strobe to be applied, for a set period of time, to a target wordline associated with the segment of the memory array.
10 . The method of claim 9 , wherein memory cells in the segment of the memory array are programmed to a number of program voltage levels to represent the data, and wherein a magnitude of the failed byte count voltage strobe targets a highest program voltage level of the number of program voltage levels.
11 . The method of claim 8 , wherein configuring the one or more parameters associated with the read operation comprises configuring a bitline voltage to be applied to a bitline of the memory array.
12 . The method of claim 9 , wherein configuring the one or more parameters associated with the read operation comprises configuring a pass voltage to be applied to one or more wordlines adjacent to the target wordline in the memory array.
13 . The method of claim 8 , wherein performing the second fine valley tracking calibration operation comprises performing a parallel auto-read calibration (pARC) operation on the segment of the memory array.
14 . The method of claim 8 , further comprising:
performing the read operation on the segment of the memory array using the configured read voltage level and the configured one or more parameters.