IP Library Granted Patent US 12,650,707
Granted Patent B2
US 12,650,707 · App. 18/373,520 · Granted Jun 9, 2026

Flicker noise free bandgap reference voltage generator circuit

Inventors: Marc Sabut (Eybens, FR); Emmanuel Allier (Grenoble, FR); Matthieu Desvergne (Claix, FR); Denis Cottin (Crolles, FR)
Assignee: STMicroelectronics International N.V.
G05F3/30
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Quick Facts
Patent No.
US 12,650,707
App. No.
18/373,520
Granted
Jun 9, 2026
Kind
B2
Abstract

A bandgap voltage generator circuit is formed using only bipolar transistors. The bandgap voltage generator circuit includes an output node at which a bandgap reference voltage is generated. A transconductance amplifier circuit in a current control feedback loop has a differential input which receives a base current. A compensation current sink circuit operates to sink a compensation current from the output node corresponding to the base current received at the differential input of the transconductance amplifier.

Claims (47)

1 . A circuit, comprising:

a bandgap voltage generator circuit, wherein the bandgap voltage generator circuit includes a current mirror circuit coupled to an output node at which a bandgap reference voltage is generated and a transconductance amplifier circuit in a current control feedback loop having a differential input which receives a base current;

wherein transistors used in the current mirror circuit and at the differential input of the transconductance amplifier circuit are only bipolar transistors; and

a compensation current sink circuit configured to sink a compensation current from the output node corresponding to the base current of the bipolar transistors at the differential input of the transconductance amplifier.

2 . The circuit of claim 1 :

wherein the transconductance amplifier circuit comprises a first bipolar transistor in diode connected configuration coupled to a second bipolar transistor with a base terminal receiving the base current; and

wherein the compensation current sink circuit comprises a third bipolar transistor in diode connected configuration coupled to a fourth bipolar transistor with a collector connected to the third bipolar transistor and a base terminal receiving the compensation current.

3 . The circuit of claim 2 , wherein the first and third bipolar transistors are matching transistors.

4 . The circuit of claim 2 , wherein the second and fourth bipolar transistors are matching transistors.

5 . The circuit of claim 2 :

wherein the transconductance amplifier circuit further comprises a tail current source coupled to the second bipolar transistor; and

wherein the current sink circuit further comprises a further current source coupled to the fourth bipolar transistor;

wherein a current magnitude of the tail current source is two times a current magnitude of the further current source.

6 . The circuit of claim 5 , further comprising:

wherein the bandgap voltage generator circuit is coupled to a virtual ground;

a shift resistor coupled between the virtual ground and a circuit ground; and

wherein a voltage drop across the shift resistor is equal or substantially equal to a voltage drop across the tail current source.

7 . The circuit of claim 1 , further comprising a current buffer circuit configured to buffer an output current of the transconductance amplifier circuit to generate a bias current for the current control feedback loop.

8 . The circuit of claim 7 , wherein the current buffer circuit comprises:

a first follower circuit having an input coupled to receive the output current of the transconductance amplifier circuit; and

a second follower circuit having an input coupled to receive an output of the first follower circuit and an output configured to generate the bias current.

9 . The circuit of claim 8 , wherein the first follower circuit comprises a first follower transistor coupled to a first current source at the output of the first follower circuit, wherein a control terminal of the first follower transistor is configured to receive the output current of the transconductance amplifier circuit, and wherein the second follower circuit comprises a second follower transistor coupled to a second current source at the output second follower circuit, wherein a control terminal of the second follower transistor is coupled to the output of the first follower circuit.

10 . The circuit of claim 9 , wherein the first current source is configured to source current to the first follower transistor and wherein the second current source is configured to sink current from the second follower transistor.

11 . A circuit, comprising:

a current mirroring circuit including a first bipolar transistor, a second bipolar transistor and a third bipolar transistor, wherein an output voltage is generated at an output node in response to a third mirrored current output by the third bipolar transistor;

a bandgap core circuit including:

a fourth bipolar transistor and a fifth bipolar transistor coupled, respectively, to the first and second bipolar transistors and configured to use a difference in base to emitter voltages of the fourth and fifth bipolar transistors to generate a complementary to absolute temperature (CTAT) voltage and a proportional to absolute temperature (PTAT) voltage from first and second mirrored currents output by the first and second bipolar transistors, respectively; and

a transconductance amplification circuit having a differential input coupled, respectively, to the first and second bipolar transistors to receive a base current, and an output coupled to apply a bias current to base terminals of the first, second and third bipolar transistors;

wherein the transconductance amplification circuit comprises a sixth bipolar transistor in diode connected configuration coupled to a seventh bipolar transistor with a base terminal at the differential input receiving the base current; and

a current sink circuit configured to sink a compensation current from the output node corresponding to the base current at the base terminal of the seventh bipolar transistor of the transconductance amplification circuit.

12 . The circuit of claim 11 , wherein the current sink circuit comprises an eighth bipolar transistor in diode connected configuration coupled to a ninth bipolar transistor with a collector connected to the eighth bipolar transistor and a base terminal receiving the compensation current.

13 . The circuit of claim 12 , wherein the sixth and eighth bipolar transistors are matching transistors.

14 . The circuit of claim 12 , wherein the seventh and ninth bipolar transistors are matching transistors.

15 . The circuit of claim 12 :

wherein the transconductance amplification circuit further comprises a tail current source coupled to the seventh bipolar transistor; and

wherein the current sink circuit further comprises a further current source coupled to the ninth bipolar transistor;

wherein a current magnitude of the tail current source is two times a current magnitude of the further current source.

16 . The voltage generator circuit of claim 15 , further comprising:

wherein the fourth and fifth bipolar transistors are coupled to a virtual ground;

a shift resistor coupled between the virtual ground and a circuit ground; and

where a voltage drop across the shift resistor is equal or substantially equal to a voltage drop across the tail current source.

17 . The voltage generator circuit of claim 11 , wherein the transconductance amplification circuit comprises a transconductance amplifier and a current buffer, wherein the current buffer is configured to buffer an output current of the transconductance amplifier to generate the bias current applied to base terminals of the first, second and third bipolar transistors.

18 . The circuit of claim 17 , wherein the current buffer comprises:

a first follower circuit having an input coupled to receive the output current of the transconductance amplifier; and

a second follower circuit having an input coupled to receive an output of the first follower circuit and an output configured to generate the bias current.

19 . The circuit of claim 18 , wherein the first follower circuit comprises a first follower transistor coupled to a first current source at the output first follower circuit, wherein a control terminal of the first follower transistor is configured to receive the output current of the transconductance amplifier, and wherein the second follower circuit comprises a second follower transistor coupled to a second current source at the output second follower circuit, wherein a control terminal of the second follower transistor is coupled to the output of the first follower circuit.

20 . The voltage generator circuit of claim 19 , wherein the first current source is configured to source current to the first follower transistor and wherein the second current source is configured to sink current from the second follower transistor.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 30, 2024
From: STMICROELECTRONICS (ALPS) SAS
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 068449/0761 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 30, 2024
From: STMICROELECTRONICS (GRENOBLE 2) SAS
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 068449/0739 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 27, 2023
From: SABUT, MARC
To: STMICROELECTRONICS (GRENOBLE 2) SAS
Reel/Frame 065048/0193 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 27, 2023
From: ALLIER, EMMANUEL; DESVERGNE, MATTHIEU; COTTIN, DENIS
To: STMICROELECTRONICS (ALPS) SAS
Reel/Frame 065048/0943 →
Continuity (1)
Related Publication 20250103072A1 · Mar 27, 2025
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